Arteris Articles

EE Times Designlines Blog: How to Not Fail ISO 26262

This EE Times blog in Designlines Automotive titled, How to Not Fail ISO 26262, is written by Kurt Shuler, VP Marketing at Arteris IP. 

Topics: functional safety ADAS eetimes mobileye ISO 26262 ASIL D tier 1 automotive design SoCs interconnects OEMs 3D mapping safety culture people process

EE Times Designlines Blog: Auto OEMs, Tier-Ones: Think SoC Designs

This EE Times blog in Designlines Automotive titled, Auto OEMs, Tier-Ones: Think SoC Designs, is written by Kurt Shuler, VP Marketing at Arteris IP. 

Topics: functional safety ADAS eetimes mobileye tier 1 automotive design LIDAR SoCs interconnects OEMs 3D mapping

SemiWiki: Supporting ASIL-D Through Your Network on Chip

Kurt Shuler, VP Marketing at Arteris IP has written a White-Paper 'How to efficiently achieve ASIL-D compliance using NoC technology', and discusses the details with Bernard Murphy in this SemiWiki blog:

Supporting ASIL-D Through Your Network on Chip 

September 20th,  2018 - By Bernard Murphy

ASIL-D compliance for safety (the top-level of safety)  in automotive applications has become much more prominent as a requirement than we might have expected. Bernard Murphy (SemiWiki) provides his take after reading Kurt Shuler’s white-paper on how the NoC interconnect connecting IPs can help meet this goal and why this approach to safety in integration is more efficient than some frequently discussed alternatives.

Topics: SoC NoC semiconductor ISO 26262 ASIL D ISO 26262 certification semiwiki kurt shuler safety culture compliance ASIL-B FMEDA failure mitigation

Arteris and Synopsys Webinar Held on Wednesday, 26 September

synopsys_color_600pxHolger Keding (Synopsys' Solutions Architect), Rocco Jonack (Arteris' Senior Solutions Architect) and Malte Doerper (Synopsys' Product Marketing) will be jointly hosting this webinar,
"Optimization of Cache Coherent Interconnects for Artificial Intelligence SoCs",
on Wednesday, 26 September, at 10 am Pacific time.

Topics: Synopsys cache coherent interconnect artificial intelligence SoCs webinar architect