Arteris Articles

SemiWiki: Intelligence in the Fog

Kurt Shuler, VP Marketing at Arteris IP, and Bernard Murphy (SemiWiki) discuss the hottest domains in tech today - AI and automotive in this new SemiWiki blog:

Intelligence in the Fog

June 12, 2019 - By Bernard Murphy

AI is creeping into places we might not expect, such as communication infrastructure. Bernard Murphy learns from Kurt Shuler how AI and AI-centric design methods are becoming more important in this surprising domain.

By now, you should know about AI in the cloud for natural language processing, image ID, recommendation, etc, etc (thanks to Google, Facebook, AWS, Baidu and several others) and AI on the edge for collision avoidance, lane-keeping, voice recognition and many other applications. But did you know about AI in the fog? First, a credit – my reference for all this information is Kurt Shuler, VP Marketing of Arteris IP. I really like working with these guys because they keep me plugged in to two of the hottest domains in tech today – AI and automotive. That and the fact that they’re really the only game in town for a commercial NoC solution, which means that pretty much everyone in AI, ADAS and a bunch of other fields (e.g. storage) is working with them.

For more information, please visit the Arteris IP AI package webpage: http://www.arteris.com/flexnoc-ai-package

Topics: SoC semiconductor automotive ADAS artificial intelligence semiwiki kurt shuler flexnoc ai package noc interconnect

Semiconductor Engineering: Machine Learning Drives High-Level Synthesis Boom

 Arteris IP's Kurt Shuler, Vice President of Marketing, quoted in the latest Semiconductor Engineering article:

Machine Learning Drives High-Level Synthesis Boom

June 6th, 2019 - By Kevin Fogarty

When a  company puts together a software/hardware design team, it's not a bad idea to make sure where the final responsibility lies.

Asking the right questions
“In China I had a long conversation with the hardware engineer about what we were trying to do, and it eventually became clear he was not the one calling the shots,” said Kurt Shuler, vice president of marketing at Arteris IP. “It was the software architect calling the shots, so we all got together and that let us move forward once I realized the chip was defined by the algorithm, not the other way around.

”But the software architect doesn’t always have a good feel for the hardware. “The other problem we had was that, often, a software architect won’t be that good at abstracting down to the transistor level, and the hardware architect may not be good at abstracting up to the software, so you have to kind of walk them through that,” said Shuler.

Insisting on tight integration and optimization of software with hardware also may be a good way to coordinate development, but it doesn’t always reflect realistic performance requirements. Shuler noted that one way to help customers think about the problem is, rather than asking the hardware architect what would happen if the chip didn’t live up to expectations, to ask what the impact on the device would be if they were to remove the chip and replace it with an off-the-shelf inference chip that would have been completely generic to the application.

For more information, please download the Arteris FlexNoC Interconnect IP data sheet; https://www.arteris.com/download-flexnoc-datasheet

Topics: SoC semiconductor engineering noc interconnect ML software architects

SemiWiki: What are SOTIF and Fail-Operational and Does This Affect You?

Kurt Shuler, VP Marketing at Arteris IP, and Bernard Murphy (SemiWiki) discuss Safety of the Intended Function (SOTIF) in this latest SemiWiki blog:

What are SOTIF and Fail-Operational and Does This Affect You?

May 22nd, 2019 - By Bernard Murphy

Standards committees, the military and governmental organizations are drawn to acronyms as moths are drawn to a flame, though few of them seem overly concerned with the elegance or memorability of these handles. One such example is SOTIF – Safety of the Intended Function – more formally known as ISO/PAS 21448. This is a follow-on to the more familiar ISO 26262. 

When you’re zipping down a busy freeway at 70mph and a safety-critical function misbehaves, traditional corrective actions (e.g., reset the SoC) are far too clumsy and may even compound the danger. You need something the industry calls “fail operational”, an architecture in which the consequences of a failure can be safely mitigated, possibly with somewhat degraded support in a fallback state, allowing for the car to get to the side of the road and/or for the failing system to be restored to a working state. According to Kurt Shuler (Arteris VP of marketing and an ISO 26262 working group member), a good explanation of this concept is covered in ISO 26262:2018 Part 10 (chapter 12, clauses 12.1 to 12.3). The system-level details of how the car should handle failures of this type are decided by the auto OEMs (and perhaps tier 1s) and the consequences can reach all the way down into SoC design. Importantly, there are capabilities at the SoC-level that can be implemented to help enable fail operational.

For more information, please visit the Arteris IP AI package webpage: http://www.arteris.com/flexnoc-ai-package

Topics: SoC semiconductor semiwiki kurt shuler flexnoc ai package ISO PAS 21448 noc interconnect SOTIF (ISO 21448

Semiconductor Engineering: Chiplet Momentum Builds, Despite Tradeoffs

 Arteris IP's Kurt Shuler, Vice President of Marketing, contributes to this latest article in Semiconductor Engineering.

Topics: SoC semiconductor engineering kurt shuler noc interconnect IP design