Arteris Articles

Semiconductor Engineering: Uses, Limits and Questions for FPGAs and Autos

Kurt Shuler, vice president of marketing at Arteris IP comments, he has seen that development is quickly moving in the direction of optimization with a lot of custom ASIC activity this Semiconductor Engineering article:

Uses, Limits and Questions for FPGAs and Autos

February 6th, 2020 - By Ann Steffora Mutschler

 

 

“Some companies are getting beyond the bounds of what can be done even in single die, looking at multidie solutions, but everything’s around optimization for power, bandwidth, latency, and functional safety,” Shuler said. “When you go to FPGA, the biggest issue is probably on the power side. Compared to a similar set of logic in ASIC versus doing an FPGA, you’ve got to basically turn on and off more transistors. That’s the underlying technical issue.

To learn more, please download this Technical Paper on "Re-Architecting SoCs for the AI Era", please go here; https://www.arteris.com/download-re-architecting-socs-for-the-ai-era

Topics: SoC Networks-On-Chip ASICs autonomous vehicles semiconductor engineering arteris ip kurt shuler noc interconnect ML/AI sensors

Arteris IP is Now Hiring a Functional Safety Manager in Campbell, CA

This is a New Featured Position!

Functional Safety Manager in Campbell, CA

Now is the time to join Arteris IP!

We are looking for an experienced Functional Safety Manager with strong quality process, hardware, and technical leadership skills to lead our ISO 26262 efforts. This person will create and execute CMMI-DEV quality processes resulting in Arteris IP products to be used in autonomous vehicles and other Functional Safety applications. He/She will also be the engineering lead for analysis of hardware IP functional safety mechanisms and designing methodologies and products to help automate that analysis.

Topics: software jobs ISO 26262 arteris ip noc interconnect job SoC designs leader IP design IEC 61508