Arteris Articles

Semiconductor Engineering: Choosing Between CCIX and CXL

Kurt Shuler, vice president of marketing at Arteris IP participates in this Experts at the Table, Part 2 with Ed Sperling in this new Semiconductor Engineering article:

Choosing Between CCIX and CXL

May 19th, 2020 - By Ed Sperling

Experts at the Table, Part 2: What's right for one design may not be right for the next. Here's why.
 
Kurt Shuler, vice president of marketing at Arteris IP said, "When CCIX first came out, there was a lot of discussion about doing larger-scale, symmetric cache-coherent systems. But as you add in die or separate chips, and you have to increase memories and caches — and data for what’s going on in the different die, and locally storing that — there’s an architectural line where it doesn’t make much sense anymore. Are you actually losing more than you’re gaining? It’s really, really hard for architects to figure out where that hump is. Even if you have 20 years of experience as a cache-coherent architect, you can’t figure this out anymore in your head or by using Excel. That doesn’t work with CCIX and CXL".
 
To learn more, please click here for the Tech Talk CXL vs. CCIX video: https://www.arteris.com/blog/semiconductor-engineering-cxl-vs.-ccix-video 
 
Topics: SoC automotive CCIX NoC technology semiconductor engineering ADAS systems tech talk video kurt shuler noc interconnect CXL IP market asymmetric PHY cache coherent

Semiconductor Engineering: Spiking Neural Networks: Research Projects or Commercial Products?

Michael Frank, fellow and chief architect at Arteris IP is quoted in this new Semiconductor Engineering article:

Spiking Neural Networks: Research Projects or Commercial Products?

May 18th, 2020 - By Byron Moyer

Opinions differ widely, but in this space that isn't unusual.
 
SNN neurons typically are implemented in one of two ways. The approaches are motivated by analog implementations, although they can be abstracted into digital equivalents.  Arteris IP   fellow and chief architect Michael Frank refers to this as “emulation.” He points to several challenges for an analog implementation: “With analog, you would need to customize the model to the specific chip for inference. No two transistors are the same. And at 7 nm, you can’t do analog.”
 
Topics: analog SoC automotive neural networks NoC technology semiconductor engineering emulation noc interconnect IP market SNN multi-cast spike data

All About Circuits: The Role of Last-Level Cache Implementation for SoC Developers

Kurt Shuler, vice president of marketing at Arteris IP authored this new All About Circuits article:

The Role of Last-Level Cache Implementation for SoC Developers

May 13th, 2020 - By Kurt Shuler

There is a challenge for SoC developers to find ways to navigate the demand of memory in their design. This article looks at how a fourth, or last-level, cache can provide a solution.

So, what’s the best memory solution? For hints, we can look at what other companies are doing. Tear-down analyses have shown that Apple, for one, solves the speed mismatch problem by adding another cache. If a big company with nearly infinite R&D resources designs around its SoCs bottlenecks this way, it’s probably worth looking into. 
 
Topics: Apple SoC NoC technology CodaCache last level cache kurt shuler noc interconnect ML IP market security All About Circuits DSP

Semiconductor Engineering: Vehicle Communications Is Due For An Overhaul

Kurt Shuler, vice president of marketing at Arteris IP is quoted in this new Semiconductor Engineering article:

Vehicle Communications Is Due For An Overhaul

May 12th, 2020 - By Ann Steffora Mutschler

The Controller Area Network (CAN), one of the main communications networks in an automobile, is headed for a security overhaul — if not a wholesale replacement.
 
Kurt Shuler, vice president of marketing at  Arteris IP , likewise stressed the need for am architecture for security from the start. “Do as much as you can at the lowest possible level, because that’s where you can have the most control later. If you’re doing everything in software later, there are still ways around that. If you have things at the hardware level — and that’s where it comes to with the interconnects and the firewalls — if you have the physical mechanisms to stop traffic that shouldn’t be there during certain use cases and you can control that later when there’s new use cases, you’re covered. But it’s got to be built in an overall architecture, where the smallest parts are the SoC transistors. This equates to fire-walling, and either poisoning data that is suspect and letting it through or firing an interrupt up to the system that says, ‘Hey, I’m being hacked.’”
 
Topics: SoC automotive NoC technology semiconductor engineering kurt shuler data centers noc interconnect IP market security CAN BUS SoC transistors

Semiconductor Engineering: Which Chip Interconnect Protocol is Better?

Kurt Shuler, vice president of marketing at Arteris IP participates in this Experts at the Table with Ed Sperling in this new Semiconductor Engineering article:

Which Chip Interconnect Protocol is Better?

May 11th, 2020 - By Ed Sperling

Experts at the Table: CXL and CCIX are different but it's not always clear which is the best choice.
 
"Everybody is circling around and trying to figure out what everybody else is doing, said Kurt Shuler, vice president of marketing at Arteris IP. CCIX is a little different. The idea there was that you would have one or more chips and they would all be one cache coherent system. So in the case of CXL, the coherency is all managed on the Xeon side, and that companion chip is always a slave. It’s different with CCIX. So if you do the bi-directional coherency, which is what people are interested in, it’s one big cache-coherent system".
 
To learn more, please click here for the Tech Talk CXL vs. CCIX video: https://www.arteris.com/blog/semiconductor-engineering-cxl-vs.-ccix-video 
 
Topics: SoC automotive CCIX NoC technology semiconductor engineering tech talk video kurt shuler data centers noc interconnect CXL IP market

Semiconductor Engineering: Who Owns A Car's Chip Architecture Video

Tech Talk Video: Who Owns a Car's Chip Architecture 

May 5th, 2020 - By Ed Sperling

Kurt Shuler, vice president of marketing at Arteris IP, examines the competitive battle brewing between OEMs and Tier 1s over who owns the architecture of the electronic systems and the underlying chip hardware. This has become a growing point of contention as both struggle for differentiation in a market where increasingly autonomous vehicles will all behave the same way. That, in turn, has significant implications for customization and standards, as well as the hiring of chip expertise inside of these companies as companies race toward fully autonomous driving.

Topics: network-on-chip semiconductor low power ADAS tech talk video on-chip memory data centers automotive chips semiengineering

Semiconductor Engineering: Key Drivers in New Chip Industry Outlook

K. Charles Janac, chairman and CEO at Arteris IP is quoted in this new Semiconductor Engineering article:

Key Drivers in New Chip Industry Outlook

May 4th, 2020 - By Ed Sperling

CEOs and analysts examine winners and losers and where demand is shifting.
 
“Opinions are all over the place,” said K. Charles Janac, chairman and CEO of Arteris IP . “If you look at high tech, about 60% of the segments are down, 40% are up. What’s up is infrastructure, which includes data centers, networking, cameras, security, entertainment and video games. What’s down are the end points — smart phones, cars, some consumer, industrial and automotive. The big question is whether this is due to the pandemic and overreaction, or whether this is going to be a debt-driving mainstream crisis.”
 
Topics: SoC automotive NoC technology semiconductor engineering K. Charles Janac data centers noc interconnect IP market covid-19 smart phones