Arteris Articles

Madelyn Miller

Madelyn Miller

Recent Posts by Madelyn Miller:

Semiconductor Engineering: AI Chips: NoC Interconnect IP Solves Three Design Challenges

 Arteris IP's Kurt Shuler warns that regular topologies, large chips, and huge bandwidths are considerations in AI-centric chips in the date center.

AI Chips: NoC Interconnect IP Solves Three Design Challenges  

January 10th,  2019 - By Kurt Shuler

New network-on-chip (NoC) interconnect IP is now available for artificial intelligence (AI) systems-on-chip (SoC). Arteris IP launched the fourth generation of FlexNoC interconnect IP with a new AI package.

The new NoC technology benefits emerging AI chip architectures in three main ways: automatically generating regular topologies, effectively managing the data flows of large chips with long wires and enabling large on- and off-chip bandwidths.

To learn more, please visit the FlexNoC AI Package page; https://www.arteris.com/flexnoc-ai-package and the Resources page: https://www.arteris.com/resources

Topics: AI chips semiconductor AI automotive neural networks ML AI SoC Designers flexnoc ai package VC-Links synchronous virtual channels noc interconnect

Semiconductor Engineering: What Makes A Good Accelerator

Kurt Shuler, VP of Marketing at Arteris IP, comments on 'What needs to be accelerated' in this Semiconductor Engineering article:

What Makes A Good Accelerator

 

October 25th, 2018 - By Ann Steffora Mutschler

Topics: semiconductor engineering arteris ip SoCs neural network soc architecture FPGAs machine learning

Semiconductor Engineering: Autonomous Vehicle Design Begins to Change Direction

Kurt Shuler, VP of Marketing at Arteris IP, comments in this Semiconductor Engineering article:

Autonomous Vehicle Design Begins To Change Direction

 

October 10th, 2018 - By Ann Steffora Mutschler

Topics: semiconductor engineering arteris ip semiconductor interconnects safety culture SOTIF ISO PAS 21448 kurt shuler autonomous car

Semiconductor Engineering: What Is SOTIF?

Kurt Shuler, VP of Marketing at Arteris IP, discusses the new ISO/PRF PAS 21448 Safety of the Intended Functionality (SOTIF) specification in this new video with Ed Sperling of Semiconductor Engineering:

What Is SOTIF?

 

October 10th, 2018 - By Ed Sperling

Topics: semiconductor engineering arteris ip semiconductor interconnects safety culture OEMs ADAS systems diagnostics