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Arteris is hiring engineers!

You may have noticed from the Arteris LinkedIn company page or our website that we have been hiring. We have three more jobs where we need top people:

We've been building our engineering team in California since before the start of 2014. You can read about the members of our engineering management team here: "Arteris Recruits World-Class Engineering Leadership Team"

This is a great opportunity to work in a collaborative environment with an experienced group of innovators like Craig Forrest (Arteris CTO, former Apple engineering VP responsible for the first 3 iPhone application processor SoCs) and Dave Parry (Arteris VP of Engineering, former Solarflare engineering VP and SVP of server systems at SGI).

 

Here's a listing of the responsibilities for each position:


Director or Senior Manager of Hardware Verification in Campbell, CA

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Reports to the VP of Engineering.

Responsibilities: 
Lead a small, focused team of engineers in the design verification of an industry-leading consumer-oriented cache-coherent interconnect solution.  Specific responsibilities include:

  • Own the verification of Arteris’s next-generation interconnect IP
  • Collaborate with other Arteris engineering leaders in the evaluation and selection of high-level language for the description/design of RTL modules and the overall interconnect solution
  • Create a verification environment and flow that enables rapid development of test-beds and timely delivery of high quality, highly configurable RTL modules
  • Recruit team members and build a team
  • Create unit and system-level test harnesses and test plans
  • Lead the verification team in the verification of individual RTL modules and full interconnect solutions; including functional verification, formal verification and emulation
  • Create/specify an environment, tools and metrics for demonstrating functional, feature and low-level coverage
  • Contribute both individually and as a leader to the hardware verification team
  • Mentor and develop team members 
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Hardware Design Engineer in Campbell, CA

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Job description:
Be a part of a focused team of hardware engineers working on the development of an industry-leading cache-coherent interconnect solution.

Responsibilities include:

  • Design and deliver high-quality RTL modules that will make up Arteris’s next-generation interconnect IP
  • Help to specify and create a design environment and flow that enables timely delivery of high quality, highly configurable RTL modules
  • Create specifications for RTL modules
  • Work closely with hardware verification team to develop test plans and strategies and ensure designs are verification-friendly
  • Contribute both individually and with the team to create a complete interconnect solution
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Hardware Verification Engineer in Campbell, CA

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Job description:
Be part of a small, focused team of engineers responsible for design verification of an industry-leading cache-coherent SoC interconnect solution. Specific responsibilities include:

  • Work closely with architects and RTL designers to develop a verification strategy and verify functional correctness of highly configurable RTL modules
  • Develop configurable/reusable test harnesses, transactors, checkers
  • Create test plans
  • Develop directed and constrained random tests according to test plans
  • Root cause failing tests
  • Analyze coverage to ensure functional, feature and low-level code coverage
  • Write assertions and apply formal verification to the design
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Topics: hardware verification hardware design arteris jobs