For the first time ever, chips manufactured with the latest process nodes will cost more than chips using older nodes. You heard that right: Chips manufactured at nodes smaller than about 20nm will actually cost more than chips created with older processes. This is a reversal of the long-standing trend whereby chips created with newer process nodes cost less because, even though the process equipment and wafers cost more, the smaller size of the dies makes up for the increased costs.

What has changed? It seems lithography costs for the sub-20nm nodes will be astronomical, reversing the cost-per-chip curve even though the die size of a comparable chip will be smaller on the sub-20nm node.

What will be the effect? My first thought was that if the sub-20nm chip/wafer costs are high enough, then this might provide an opening for through-silicon via (TSV) or some other 3D manufacturing or assembly technology. I can see a world where only the parts of a chip that must be created at the “expensive” process nodes are manufactured on a small die, and the other parts of the chip are created with a larger process node. I’ve already heard this discussed at the GSA 3D-IC working group meetings, especially with regards to memory (Wide I/O) and analog circuitry.

#2: Never assume what you call your product or technology is what other people call it!

I wasn’t prepared for this, but I should have been considering that I’ve actually taught MBA-level college courses on this: Just because you use a certain name for your technology or product does not mean that others use that same name—especially if you are in an emerging market segment where naming standards have not yet evolved.

I usually refer to what my company creates as “on-chip interconnect IP” or “the SoC interconnect.” However, I found that almost half of the analysts refer to what we do as a “fabric,”or a concatenation of fabric like “SoC fabric” or “fabric IP.” I’ve now tasked myself with finding the perfect word(s) to describe what we make, in terms so simple my family members will understand. Any ideas?

The good news is that all the analysts understood how our core technology, what is commonly called network-on-chip technology, acts as the foundation for the “fabric” or “interconnect” IP products.

It helped that I remembered that a technology is not a product! Describing NoC technology without first stating what problems my company and products solve, and for whom, would have been very confusing. (I’m emphasizing this point because I have had many conversations with industry peers about their technologies without first having a clue what problems they solve, and for whom. Engineers, marketers and senior execs make this mistake. We are all equally guilty.)

#3: The IP industry is growing up

With ARM doing so well, Imagination buying MIPS, Cadence buying Tensilica, and Synopsys bulldozing ahead, the IP industry is reaching a certain level of maturity. ARM has worked over the last decade or so to establish the “license fee plus royalties” IP business model that is followed by most IP companies today, including my own. We’re also seeing consolidation as evidenced by the first sentence in this paragraph. What this means is that the evolution of the IP industry from a primarily services-focused business model to a product-focused model is nearly complete.

One thing that did not surprise me was who are the top IP value earners in a SoC, as evidenced by licensing fees and royalties. The top two IPs by value are CPU IP and GPU IP, which isn’t a surprise to most of us. But did you know the number three spot is held by “SoC interconnect fabric IP”?

This is good news but also creates a problem: When your company is helping to define and create a new market or technology segment, one of the biggest challenges is helping your customers and your industry’s analysts to recognize that segment as distinct and separate from what already exists. That will be my challenge in the coming year. This happened with what are now commonly known segments such as “applications processors” (a segment of SoCs), one-time programmable (OTP) memory (a segment of non-volatile memory), and even “iPhone apps.” All technologists and marketers in our industry have to do this when participating in new markets. I will know I’ve been successful when “SoC interconnect fabric IP” is no longer lumped into the “miscellaneous” or “infrastructure IP” headings in market research reports.

The meetings with the 13 analysts were very informative and I greatly appreciate their knowledge and expertise. I encourage every one of us to periodically step outside of our own bubbles to learn from others, and share what we have learned. Meeting with industry analysts, sharing ideas, and debating their consequences was intellectually exhilarating but also very useful in helping me think about future technologies and products.

—Kurt Shuler is vice president of marketing at Arteris.

As featured in: