K. Charles Janac, President and CEO, at Arteris IP, authored this article on what is now defined as a "Monster Chip".
September 19, 2019 - by K. Charles Janac
What are the system designs that require a leap in SoC complexity? It’s not only big datacenter artificial intelligence (AI) chips, but also autonomous vehicles such as cars, trucks and drones; they are self-landing, reusable rockets; they are medical devices carrying out remote diagnostics; and they are connected machine tool controllers supporting smart manufacturing.
These chips are starting to be referred to as “Monster Chips” because of both the size and complexity.
Cache Coherency in Monster Chips
The age of the monster chips will lead to systems able to make automated decisions based on sophisticated hardware and software building blocks. Moreover, it will drive further development of IP blocks and EDA design tool technologies required to manage projects of this complexity without exceeding the ability of human designers to execute them within reasonable time and cost.
Read the entire EETimes DesignLines article, please click here; https://www.eetimes.com/author.asp?section_id=36&doc_id=1335114&page_number=1
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