Arteris IP's Kurt Shuler warns that regular topologies, large chips, and huge bandwidths are considerations in AI-centric chips in the date center.
AI Chips: NoC Interconnect IP Solves Three Design Challenges
January 10th, 2019 - By Kurt Shuler
New network-on-chip (NoC) interconnect IP is now available for artificial intelligence (AI) systems-on-chip (SoC). Arteris IP launched the fourth generation of FlexNoC interconnect IP with a new AI package.
The new NoC technology benefits emerging AI chip architectures in three main ways: automatically generating regular topologies, effectively managing the data flows of large chips with long wires and enabling large on- and off-chip bandwidths.
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