Arteris Articles

Semiconductor Engineering: Not Enough Respect for SoC Interconnect

K. Charles Janac, CEO at Arteris IP, shares his opinion in this week's blog appearing in Semiconductor Engineering:

Not Enough Respect for SoC Interconnect

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July 30th, 2018 - By K. Charles Janac

Why on-chip networks are critical to IP integration.

For high-volume system-on-chip (SoC) applications—artificial intelligence (AI), automotive, mobility, solid state drives and more—effective interconnect technology can generate hundreds of millions of dollars in revenue due to smaller chip area, better functionality and faster delivery of SoC platforms. State-of-the-art interconnect technology also allows chip designers to create SoC derivatives more efficiently, accelerating their ability to respond to changing market needs.

Why don’t interconnect IPs receive the respect they deserve? It could be that the majority of today’s senior managers and technologists were taught about processors and memory to the exclusion of SoC assembly technology in engineering schools. Moreover, years of effective marketing may have created a consciousness around processor technology without a corresponding amount of information being generated about interconnect IPs and SoC assembly in general.

  Download peer-reviewed Springer journal paper about Arteris FlexNoC QoS

To read the entire article, please click here:
https://semiengineering.com/not-enough-respect-for-soc-interconnect

Topics: SoC functional safety SoC security semiconductor advanced driver assistance systems adas flexnoc interconnect semiconductor engineering soc architecture AI arteris ip ips K. Charles Janac on-chip memory interconnects logic IP modules SoC assembly topologies 5G mobility QoS