Arteris Articles

K. Charles Janac, President and CEO, at Arteris IP, authored this article on how an effective interconnect makes delivering a complex SoC easier, more predictable, and less costly.

August 25, 2019 - by K. Charles Janac

An interconnect handles various types of traffic inside an SoC and is a mechanism for effective IP block integration. The interconnect is the most configurable IP in the SoC — typically changing many times during a project and nearly always changing between projects. It also plays a vital role in security and functional safety because it carries most of the SoC data and contains nearly all the SoC’s long wires and system-level services, including quality of service (QoS), visibility, physical awareness, and power management. The interconnect enables cache coherency in multiprocessor SoCs, high-performance and bandwidth levels in advanced driver assistance systems (ADAS) automotive chips and networking SoCs, and ultra-low power in long-running consumer devices.

K. Charles Janac, CEO at Arteris IP, shares his opinion in this week's blog appearing in Semiconductor Engineering:

Not Enough Respect for SoC Interconnect

July 30th, 2018 - By K. Charles Janac

Learn how the brains of autonomous vehicles work with this easy-to-understand (and free) article

I am often asked by engineers who are not experts on autonomous vehicles exactly how the semiconductor systems in a car work as the brains of an autonomous system. A follow-up question is usually about vendors' current products and market trends.

I often start of by describing the current state-of-the-art in advanced driver assistance systems (ADAS), the importance of functional safety standards for these systems, and then talk about the technology gap we need to traverse to be able to create fully autonomous systems. I invariable end up babbling incoherently in a flurry of abbreviations and acronyms: NHTSA, ISO 26262, SEooC, V2I, CNN, etc.