Arteris Articles

SemiWiki: How Should I Cache Thee? Let Me Count the Ways

Kurt Shuler, VP Marketing at Arteris IP, updates Bernard Murphy (SemiWiki), on some of the interesting ways AI is driving caching in this new SemiWiki blog:

How Should I Cache Thee? Let Me Count the Ways

September 25th, 2019 - By Bernard Murphy

Caching is well-known as a method to increase processing performance and reduce power by reducing need for repeated accesses to main memory. What may be less well-known is how varied this technique has become, especially in and around AI accelerators. 

Caching intent largely hasn’t changed since we started using the concept – to reduce average latency in memory accesses and to reduce average power consumption in off-chip reads and writes. The architecture started out simple enough, a small memory close to a processor, holding most-recently accessed instructions and data at some level of granularity (e.g. a page). Caching is a statistical bet; typical locality of reference in the program and data will ensure that multiple reads and writes can be made very quickly to that nearby cache memory before a reference is made outside that range. When a reference is out-of-range, the cache must be updated by a slower access to off-chip main memory. On average a program runs faster because, on average, the locality of reference bet pays off.

You can learn more by visiting the Arteris IP Ncore Cache Coherent Interconnect IP webpage; http://www.arteris.com/ncore and the CodaCache Last Level Cache IP webpage; http://www.arteris.com/codacache-last-level-cache

Topics: SoC semiconductor automotive artificial intelligence ncore cache coherent interconnect semiwiki CodaCache kurt shuler noc interconnect ai accelerators

SemiWiki: AI, Safety and the Network

Kurt Shuler, VP Marketing at Arteris IP, and Bernard Murphy (SemiWiki) discuss, 'What is driving the boom in AI-centric design', in this new SemiWiki blog:

AI, Safety and the Network

September 4th, 2019 - By Bernard Murphy

You probably know that Arteris IP is very active in AI and safety, leveraging their central value in network-on-chip (NoC) architectures. Bernard Murphy of SemiWiki blogged on Kurt Shuler's front-to-back white-paper to walking us through the essentials of AI, particularly machine learning (ML) and its application for example in cars.

Kurt also highlights an interesting point about this rapidly evolving technology. As we build automation from the edge to the fog to the cloud, functionality, including AI, remains quite fluid between levels. Kurt points out that this is somewhat mirrored in SoC design. In both cases architecture is constrained by need to optimize performance and minimize power across the system through intelligent bandwidth allocation and data locality. And for safety-critical applications, design and verification for safety around intelligent features must be checked not only within and between SoCs in the car but also beyond, for example in V2x communication between cars and other traffic infrastructure.

You can learn more by downloading this Arteris IP white paper titled, Re-Architecting SoCs for the AI Era: https://semiwiki.com/automotive/274598-ai-safety-and-the-network/

Topics: SoC functional safety ISO 26262 semiconductor automotive ADAS machine learning artificial intelligence semiwiki kurt shuler flexnoc ai package noc interconnect

SemiWiki: Intelligence in the Fog

Kurt Shuler, VP Marketing at Arteris IP, and Bernard Murphy (SemiWiki) discuss the hottest domains in tech today - AI and automotive in this new SemiWiki blog:

Intelligence in the Fog

June 12, 2019 - By Bernard Murphy

AI is creeping into places we might not expect, such as communication infrastructure. Bernard Murphy learns from Kurt Shuler how AI and AI-centric design methods are becoming more important in this surprising domain.

By now, you should know about AI in the cloud for natural language processing, image ID, recommendation, etc, etc (thanks to Google, Facebook, AWS, Baidu and several others) and AI on the edge for collision avoidance, lane-keeping, voice recognition and many other applications. But did you know about AI in the fog? First, a credit – my reference for all this information is Kurt Shuler, VP Marketing of Arteris IP. I really like working with these guys because they keep me plugged in to two of the hottest domains in tech today – AI and automotive. That and the fact that they’re really the only game in town for a commercial NoC solution, which means that pretty much everyone in AI, ADAS and a bunch of other fields (e.g. storage) is working with them.

For more information, please visit the Arteris IP AI package webpage: http://www.arteris.com/flexnoc-ai-package

Topics: SoC semiconductor automotive ADAS artificial intelligence semiwiki kurt shuler flexnoc ai package noc interconnect

Semiconductor Engineering: Interconnect Prominence In Fail-Operational Architectures

 Arteris IP's Kurt Shuler, Vice President of Marketing, authored this latest article in Semiconductor Engineering about moving toward "Fail Operational"

Topics: SoC automotive ADAS semiconductor engineering kurt shuler ISO PAS 21448 noc interconnect