Arteris Articles

Semiconductor Engineering: New Architectural Issues Facing Auto Ecosystem

Kurt Shuler, vice president of marketing at Arteris IP comments, technology-wise, there are two key trends - electrification and autonomy, then who owns the data in this new Semiconductor Engineering article:

New Architectural Issues Facing Auto Ecosystem

March 5th, 2020 - By Ann Steffora Mutschler

Semiconductor vendors are trying to do more system-level work, while EDA companies are starting to integrate some of their tools and IP, so they all work together, Shuler said. “For the Tier 1s this means, just like the hyperscalar companies like the Googles, the Facebooks, the Amazons, and the Microsofts, they are now designing their own chips. That means they’re competing below and they’re competing above. ‘Mr. OEM, we can take care of all of this for you. You just make the plastics. You don’t need to know how all this stuff works.’ And the OEMs are now saying, ‘Hey, wait a minute, this is our brand, this is our car. We need to start hiring chip people too.’ Everybody is, within the car itself, clashing from a business and technical standpoint,” Shuler said.

There are other potential conflicts and challenges to go along with this, such as what to do when data comes into a car, where and how that data should be processed, and who ultimately owns the data.

“Think about how much data your cell phone creates, as well as all of the security breaches that have happened,” said Arteris IP’s Shuler. “The car has a whole bunch of information just like that cell phone, and there’s a fight over who owns that info.

To learn more, please download this Technical Paper on "Re-Architecting SoCs for the AI Era", please go here; https://www.arteris.com/download-re-architecting-socs-for-the-ai-era

Topics: SoC ISO 26262 Networks-On-Chip autonomous vehicles semiconductor engineering arteris ip kurt shuler OEMs noc interconnect ML/AI Tier 1s electrification

Semiconductor Engineering: Uses, Limits and Questions for FPGAs and Autos

Kurt Shuler, vice president of marketing at Arteris IP comments, he has seen that development is quickly moving in the direction of optimization with a lot of custom ASIC activity this Semiconductor Engineering article:

Uses, Limits and Questions for FPGAs and Autos

February 6th, 2020 - By Ann Steffora Mutschler

 

 

“Some companies are getting beyond the bounds of what can be done even in single die, looking at multidie solutions, but everything’s around optimization for power, bandwidth, latency, and functional safety,” Shuler said. “When you go to FPGA, the biggest issue is probably on the power side. Compared to a similar set of logic in ASIC versus doing an FPGA, you’ve got to basically turn on and off more transistors. That’s the underlying technical issue.

To learn more, please download this Technical Paper on "Re-Architecting SoCs for the AI Era", please go here; https://www.arteris.com/download-re-architecting-socs-for-the-ai-era

Topics: SoC Networks-On-Chip ASICs autonomous vehicles semiconductor engineering arteris ip kurt shuler noc interconnect ML/AI sensors

Semiconductor Engineering: CEO Outlook: 2020 Vision

 Arteris IP's CEO, Charlie Janac, is quoted in a 2020 survey of CEOs from across the country in this Semiconductor Engineering article:

CEO Outlook: 2020 Vision

January 6th, 2020 - By Ed Sperling

5G, China and AI are prominent, but big changes are coming everywhere.

 

“In 2020, highway driving starts to become real for autonomous vehicles,” said K. Charles Janac, CEO of ArterisIP. “You’re also going to see more applications for machine learning and AI emerge. Right now, there is too much money being spent on this by big Internet companies that are doing a lot internally. Those investments will shift. You’ll also see 5G becoming very important. We will need that for the last mile. The other killer app is cyber security, and this is one that is somewhat worrisome because we’re starting to see 5G and machine learning being used to track entire populations.”

To learn more, please download this Technical Paper on "Re-Architecting SoCs for the AI Era", please go here; https://www.arteris.com/download-re-architecting-socs-for-the-ai-era

Topics: SoC Networks-On-Chip autonomous vehicles semiconductor engineering arteris ip K. Charles Janac charlie janac noc interconnect ML/AI 5G cyber security

EE Times article, SoC Interconnect: Don't DIY!

Kurt Shuler, VP Marketing at Arteris IP, explains why a DIY approach to building your own configurable interconnect IP product is not as easy as one may think.

June 13, 2019 - by Kurt Shuler

The recent market consolidation might have some companies considering whether this is a do-it-yourself (DIY) project that your company should consider taking on. Whether it’s a simple crossbar switch or a full-function network-on-chip (NoC) architecture for advanced SoCs, all that’s needed are the right people with the right knowledge and a big budget; eventually, it could happen. But the question isn’t can you do it? It’s should you do it?

Topics: semiconductor eetimes autonomous vehicles AI automotive design SoCs kurt shuler noc interconnect ML/AI