Arteris Articles

Arteris and Synopsys Webinar Held on Wednesday, 26 September

synopsys_color_600pxHolger Keding (Synopsys' Solutions Architect), Rocco Jonack (Arteris' Senior Solutions Architect) and Malte Doerper (Synopsys' Product Marketing) will be jointly hosting this webinar,
"Optimization of Cache Coherent Interconnects for Artificial Intelligence SoCs",
on Wednesday, 26 September, at 10 am Pacific time.

Topics: Synopsys cache coherent interconnect artificial intelligence SoCs webinar architect

New EE Times article on Automotive SoCs and Interconnect IP

EE Times just published a new article I wrote about how the automotive industry has replaced the mobile phone industry as the driver for new semiconductor technologies.

Read now: "Mission Critical in Auto SoC: Interconnect IP"

 

Topics: Ncore cache coherent interconnect eetimes Arteris FlexNoC

Arteris Ncore Cache Coherent Interconnect IP Featured in Linley Group Paper

Arteris' Ncore Cache Coherent Interconnect IP was featured in a Linley Group white paper titled, "Easing Heterogeneous Cache Coherent SoC Design using Arteris’ Ncore Interconnect."

Topics: Ncore cache coherent interconnect The Linley Group white paper download

Arteris Ncore featured in AnandTech

Arteris Ncore has been featured in a detailed article in AnandTech by Andrei Frumusanu titled, "Arteris Announces Ncore Cache-Coherent Interconnect." You can see the big link in the top left of the home page or read it directly at http://anandtech.com/show/10339/arteris-announces-ncore-cachecoherent-interconnect.

Topics: new product Ncore cache coherent interconnect