Arteris Articles

Semiconductor Engineering: Adding NoCs To FPGA SoC

Ty Garibay, CTO at Arteris IP, comments on Bridging the gap:

Adding NoCs To FPGA SoCs 


June 28th,  2018 - By Ann Steffora Mutschuler

As complexity and device sizes rise, so does the need for an on-chip network.

Topics: FlexNoC hardware functional safety FPGA SoCs arteris ip digital SerDes 100-gigabit HBM2 Ty Garibay CTO NoC

Is An FPGA IP Business Model Finally Possible?

As featured in:
The IP-SoC conference panel, “IPs on FPGA: Strategy and Vision,” was a learning experience for me. Coming from the software and silicon/ASIC/ASSP worlds, I thought I had a pretty comprehensive view of all the various IP licensing models and their technical implementations. But I learned something new that makes me feel positive about the FPGA’s abilities to finally offer a robust market of third party IP. 

Topics: Interconnect economics FPGA IP