Arteris Articles

Arteris IP is Hiring a Hardware Verification Engineer in Paris!

Featured Position!

Hardware Verification Engineer in Paris (Guyancourt), France

Do you want to contribute to the backbone of the some of the world's most popular SoCs? You will work with an expert team to design and deliver interconnect & memory hierarchy solutions. You'll verify designs created in a powerful language that blends traditional RTL with leading-edge software to provide extremely configurable, testable, and high-quality solutions. You’ll have to ensure that our IPs are matching the specifications before been released to our customers, to be part of a SoC for AI, IoT, automotive, mobile... our IP is used everywhere!

Topics: hardware verification arteris ip RTL noc interconnect job SoC designs C/C++ Python

Arteris IP is Hiring a Senior Software Engineer in Campbell, CA

Featured Position!

Senior Software Engineer in Campbell, CA

We are looking for an experienced Senior Software Engineer to participate in the development of our next generation network-on-chip (NoC) interconnect design and optimization software.

You, as a successful candidate, will be able to design and implement solutions to some of the most challenging hardware interconnect problems.

Our current product is powering the creation of the most advanced artificial intelligence, mobile phone, and self-driving car SoCs.

Topics: software jobs artificial intelligence arteris ip noc interconnect job SoC designs C++ Java

Arteris IP is Hiring a Senior Software Engineering Manager in Campbell, CA!

Featured Position!

Senior Software Engineering Manager in Campbell, CA

Would you like to be part of a team contributing to products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

This management position reporting to the VP of Engineering requires a dynamic and self-motivated individual with excellent organizational, and technical skills who can effectively communicate across all levels of management. The ideal candidate will be an experienced leader who is visionary, strategic, technology savvy and skilled in contemporary software technologies and architectures. You will own and drive both development and quality engineering across multiple development teams.

Topics: software jobs arteris ip noc interconnect job SoC designs C++ Java leader IP design EDA

SystemC Gurus Wanted! Arteris IP is Hiring Performance Modeling Engineers

Featured Position!

Performance Modeling Engineer
in Campbell, CA or Austin, TX

Would you like to be part of a team creating products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

We are growing our Performance Team to develop models for our next generation product.

Topics: AXI OCP ASIC design cache coherency system level modeling SystemC arteris ip SoCs noc interconnect job CHI