Arteris Articles

Semiconductor Engineering: The Race To Multi-Domain SoCs

 Arteris IP's CEO looks at how automotive and AI are Altering chip design in this article in Semiconductor Engineering;

The Race To Multi-Domain SoCs

February 7th,  2019 - By Ed Sperling

K. Charles Janac, president and CEO of Arteris IP, sat
down with Semiconductor Engineering to discuss the impact of automotive and AI on chip design. What follows are excerpts of that conversation.

SE: What do you see as the biggest changes over the next 12 to 24 months?
Janac: There are segments of the semiconductor market that are shrinking, such as DTV and simple IoT. Others are going through an investment phase, including automotive, AI/machine learning and China. You really want to be focused on those segments. 

SE: So does IP that’s being developed today look radically different than it did five years ago?
Janac:
Yes, everything is getting amazingly complex. What people are building right now are multi-domain SoCs. The CPU, which used to do all the work, does relatively less work. There are accelerators for vision and data analysis outside of the CPU subsystem. There are machine learning sections, some general-purpose, some very specific, all on-chip. There is a memory subsystem with very high-bandwidth memory and low latency. There also is functional safety. You need tremendous performance because a car is a supercomputer on wheels. The car has to be very efficient, because you need to deliver that compute power without water cooling. Power management becomes very sophisticated. And then there are functional safety and security subsystems to keep these safe from environmental and man-made issues.

SE: Where does the network on chip (NoC) fit into all of this?
Janac: All data goes through the NoC of the chip. There are opportunities for generating value from that. But the increase in complexity is increasing the number and sophistication of the interconnect parts of the chip. Before, you may have had networks on chip. Now you may have 20 or 30.

Topics: semiconductor automotive ADAS neural networks AI LIDAR flexnoc ai package noc interconnect ML AI SoC Designers chiplets

EE Times Designlines Blog: Auto OEMs, Tier-Ones: Think SoC Designs

This EE Times blog in Designlines Automotive titled, Auto OEMs, Tier-Ones: Think SoC Designs, is written by Kurt Shuler, VP Marketing at Arteris IP. 

Topics: functional safety ADAS eetimes mobileye tier 1 automotive design LIDAR SoCs interconnects OEMs 3D mapping

Semiconductor Engineering: FPGAs Drive Deeper Into Cars

Ty Garibay, CTO at Arteris IP, provides his expertise in this Semiconductor Engineering article:

FPGAs Drive Deeper Into Cars

 

July 9th, 2018 - By Ann Steffora Mutschler

Topics: FPGAs semiconductor autonomous vehicles autonomous driving semiconductor engineering arteris ip LIDAR SoCs

Semiconductor Engineering: Progress And Chaos On Road To Autonomy

K. Charles Janac, president and CEO at Arteris IP, says “The implications of this change are incredible,” in this Special Report, Semiconductor Engineering article:

Progress And Chaos On Road To Autonomy

 

June 7th, 2018 - By Jeff Dorsch

Topics: semiconductor IP autonomous driving semiconductor engineering arteris ip K. Charles Janac Audi LIDAR Denso Toyota