Arteris Articles

Semiconductor Engineering: Artificial Intelligence Chips: Past, Present and Future

Ty Garibay, CTO at Arteris IP, authored this Semiconductor Engineering article:

Artificial Intelligence Chips: Past, Present and Future


August 2nd, 2018 - By Ty Garibay

Topics: semiconductor memory autonomous vehicles autonomous driving semiconductor engineering deep learning arteris ip SoCs interconnects algorithms AI chips

How is SSD flash memory like a helicopter?

It destroys itself as it is operating.*

Bear with me now as I explain how SSD flash memory works similar to helicopters...

First, let's explain the helicopter part of this analogy: Fixed wing aviators (i.e. non-helicopter pilots) are keen to remind people that the act of converting a jet engine's axial force into the orthogonal axis required to spin a helicopter rotor requires a sophisticated gearbox that slowly (and sometimes not so slowly) grinds itself to death through friction.

Topics: enterprise SSD flexnoc resilience package memory reliability

SemiEngineering: Memory Choices Grow

Editor's note: This is a great article by Ed Sperling at Semiconductor Engineering, so I have highlighted it here. Cache coherency in modern SoCs is discussed toward the middle of the article. -Kurt

Read the entire article at Semiconductor Engineering.

Memory Choices Grow

Memory is emerging as the starting point for SoCs, adding more confusion to already complex designs.


Memory is becoming one of the starting points for SoC architectures, evolving from a basic checklist item that was almost always in the shadow of improving processor performance or lowering the overall power budget. In conjunction with that shift, chipmakers must now grapple with many more front-end decisions about placement, memory type and access prioritization.

Topics: cache coherent IP memory