Arteris Articles

ElectronicDesign Article: Speed Machine-Learning Accelerators with Flexible Interconnect


This ElectronicsDesign article, 'Speed Machine-Learning Accelerators with Flexible Chip Interconnect', covers the announcement of Arteris IP's new FlexNoc with AI Package in this interview with Kurt Shuler, VP Marketing at Arteris IP. 

November 1 , 2018 - By William Wong

Topics: OEMs SoCs noc multicast AI FlexNoC AI chips broadcast torus noc autonomous vehicles VC-Links

EE Times article, "Who's Who in AI SoCs," highlights Arteris IP

This EE Times article, "Who's Who in AI SoCs", highlights Arteris IP's role in artificial intelligence (AI) and machine learning (ML) chips in this interview with Kurt Shuler, VP Marketing at Arteris IP. 

November 1, 2018 - by Junko Yoshida

Topics: eetimes OEMs automotive design SoCs noc multicast AI FlexNoC AI chips DNN broadcast

Semiconductor Engineering: What Is SOTIF?

Kurt Shuler, VP of Marketing at Arteris IP, discusses the new ISO/PRF PAS 21448 Safety of the Intended Functionality (SOTIF) specification in this new video with Ed Sperling of Semiconductor Engineering:

What Is SOTIF?

 

October 10th, 2018 - By Ed Sperling

Topics: semiconductor engineering arteris ip semiconductor interconnects safety culture OEMs ADAS systems diagnostics

Semiconductor Engineering: Adding Safety Into Automotive Design

Kurt Shuler, VP of Marketing at Arteris IP, comments on 'safety ready' or 'ASIL D ready' in this Semiconductor Engineering article:

Adding Safety Into Automotive Design

 

October 4th, 2018 - By Ann Steffora Mutschler

Topics: semiconductor engineering arteris ip semiconductor interconnects safety culture ISO 26262 ASIL D OEMs ADAS systems