Arteris Articles

Semiconductor Engineering: New Architectural Issues Facing Auto Ecosystem

Kurt Shuler, vice president of marketing at Arteris IP comments, technology-wise, there are two key trends - electrification and autonomy, then who owns the data in this new Semiconductor Engineering article:

New Architectural Issues Facing Auto Ecosystem

March 5th, 2020 - By Ann Steffora Mutschler

Semiconductor vendors are trying to do more system-level work, while EDA companies are starting to integrate some of their tools and IP, so they all work together, Shuler said. “For the Tier 1s this means, just like the hyperscalar companies like the Googles, the Facebooks, the Amazons, and the Microsofts, they are now designing their own chips. That means they’re competing below and they’re competing above. ‘Mr. OEM, we can take care of all of this for you. You just make the plastics. You don’t need to know how all this stuff works.’ And the OEMs are now saying, ‘Hey, wait a minute, this is our brand, this is our car. We need to start hiring chip people too.’ Everybody is, within the car itself, clashing from a business and technical standpoint,” Shuler said.

There are other potential conflicts and challenges to go along with this, such as what to do when data comes into a car, where and how that data should be processed, and who ultimately owns the data.

“Think about how much data your cell phone creates, as well as all of the security breaches that have happened,” said Arteris IP’s Shuler. “The car has a whole bunch of information just like that cell phone, and there’s a fight over who owns that info.

To learn more, please download this Technical Paper on "Re-Architecting SoCs for the AI Era", please go here; https://www.arteris.com/download-re-architecting-socs-for-the-ai-era

Topics: SoC ISO 26262 Networks-On-Chip autonomous vehicles semiconductor engineering arteris ip kurt shuler OEMs noc interconnect ML/AI Tier 1s electrification

ElectronicDesign Article: Speed Machine-Learning Accelerators with Flexible Interconnect


This ElectronicsDesign article, 'Speed Machine-Learning Accelerators with Flexible Chip Interconnect', covers the announcement of Arteris IP's new FlexNoc with AI Package in this interview with Kurt Shuler, VP Marketing at Arteris IP. 

November 1 , 2018 - By William Wong

Topics: autonomous vehicles FlexNoC AI SoCs AI chips OEMs noc multicast torus noc broadcast VC-Links

EE Times article, "Who's Who in AI SoCs," highlights Arteris IP

This EE Times article, "Who's Who in AI SoCs", highlights Arteris IP's role in artificial intelligence (AI) and machine learning (ML) chips in this interview with Kurt Shuler, VP Marketing at Arteris IP. 

November 1, 2018 - by Junko Yoshida

Topics: eetimes FlexNoC AI automotive design SoCs AI chips OEMs noc multicast DNN broadcast

Semiconductor Engineering: What Is SOTIF?

Kurt Shuler, VP of Marketing at Arteris IP, discusses the new ISO/PRF PAS 21448 Safety of the Intended Functionality (SOTIF) specification in this new video with Ed Sperling of Semiconductor Engineering:

What Is SOTIF?

 

October 10th, 2018 - By Ed Sperling

Topics: semiconductor semiconductor engineering arteris ip ADAS systems interconnects OEMs safety culture diagnostics