Arteris Articles

Semiconductor Engineering: Maximizing Value Post-Moore's Law

Kurt Shuler, Vice President of Marketing at Arteris IP quoted in this new article in Semiconductor Engineering:

Maximizing Value Post-Moore's Law

July 13th, 2020 - By Brian Bailey

The value of a semiconductor can be difficult to measure because it involves costs and benefits over time. As market segments feel different pressures, maximizing value is going in several directions. 

 
“Assessing value is really hard because it is over the lifetime,” says Kurt Shuler, vice president of marketing at Arteris IP. “A lot of chips are disposable. Consider your cell phone. You don’t really care if it’s working 10 years from now. For the data center guys and the AI chips, it’s the same thing. Certain industries do want that chip to last for 15 or 20 years, and that’s automotive, industrial — those kinds of things where there’s a huge capital cost component to that piece of equipment and people are not going to be throwing it away.
 
Topics: SoC IoT ADAS NoC technology semiconductor engineering soc architecture AI kurt shuler data centers noc interconnect IP market chip costs

Semiconductor Engineering: Designing For Extreme Low Power

Kurt Shuler, Vice President of Marketing at Arteris IP comments in this new article in Semiconductor Engineering:

Designing For Extreme Low Power

July 9th, 2020 - By Brian Bailey

Power is becoming a differentiator in many designs, and for IoT and edge devices it may be the most important competitive differentiation. 

 
Most IoT edge devices are basically fairly similar. “The chip basically has sensing, processing and communication,” says Kurt Shuler, vice president of marketing at  Arteris IP . “There is usually one sensor, or multiple sensors attached to it. These things are polling or communicating periodically. They usually have a part of the chip that they call ‘always on’, even though it’s not always on. It’s doing the communications and checking to see if there’s anything from a sensor. Compared to a mobile phone, or some AI chips or an ADAS chip, these chips are not huge. These are really tiny chips, but the power management within them is really complex.”
 
Topics: SoC IoT ADAS NoC technology semiconductor engineering soc architecture kurt shuler noc interconnect IP market

Semiconductor Engineering: Winners and Losers At The Edge

Kurt Shuler, Vice President of Marketing at Arteris IP comments in this new article in Semiconductor Engineering:

Winners and Losers At The Edge

July 7th, 2020 - By Ed Sperling

No company owns this market yet — and won’t for a very long time. 

 
 
“Everything is use-case based when designing the NoC,” said Kurt Shuler, vice president of marketing at  Arteris IP . “You’ve got to understand what the use case is to be able to size up that NoC. There are two aspects of this. One is in the creation of that network on chip and the configuration of it, and what gets burned into the chip. The other step is, once you’ve created all the roads — they’re this long or this wide — that’s it.
 
Topics: SoC automotive NoC technology semiconductor engineering AI kurt shuler noc interconnect ML IP market

Semiconductor Engineering: Variables Complicate Safety-Critical Device Verification

Kurt Shuler, Vice President of Marketing at Arteris IP participates in this new "Experts at the Table" article in Semiconductor Engineering:

Variables Complicate Safety-Critical Device Verification 

July 1st, 2020 - By Ann Steffora Mutschler

What's the best way to approach designs like AI chips for automotive that can stand the test of time? 

 
SE: Where does the industry stand with the task of verifying safety-critical devices today?
 
Kurt Shuler responds, "At the chip level we still have a situation where the verification people and methodologies are separate from the functional safety people and methodologies. This results in some overlap and rework. As tools and data interchange standards (like IEEE P2851 being led by both IEEE and Accellera) mature, we’ll be able to have more automation where functional safety validation through fault injection can be executed as part of regular verification processes. This will help everyone in the industry have more confidence that products don’t regress in diagnostic coverage as new versions are developed and will provide integrators/users of safety-critical systems to more easily perform fault injection validation of safety mechanisms if they desire."
 
Topics: SoC ISO 26262 automotive NoC technology semiconductor engineering ASIL D AI chips noc interconnect IP market IEEE P2851 fault injection