Arteris Articles

SemiWiki: On-Chip Networks at the Bleeding Edge of ML

On-chip networks become a lot more challenging at the high-end of machine learning (ML). Bernard Murphy (SemiWiki) talked with Kurt Shuler, VP Marketing at Arteris IP, about the experience they have developed over the years of working with well-known ML product builders and how this has influenced  the AI package recently released by Arteris IP in this SemiWiki blog:

On-Chip Networks at the Bleeding Edge of ML 

November 29th,  2018 - By Bernard Murphy

I wrote a while back about some of the more exotic architectures for machine learning (ML), especially for neural net (NN) training in the data center but also in some edge applications. In less hairy applications, we’re used to seeing CPU-based NNs at the low end, GPUs most commonly (and most widely known) in data centers as the workhorse for training, and for the early incarnations of some mobile apps (mobile AR/MR for example), FPGAs in applications where architecture/performance becomes more important but power isn’t super-constrained, DSPs in applications pushing performance per watt harder and custom designs such as the Google TPU pushing even harder.

Topics: SoC semiwiki kurt shuler NoC semiconductor machine learning FPGAs AI chips FlexNoC flexnoc ai package

SemiWiki: Supporting ASIL-D Through Your Network on Chip

Kurt Shuler, VP Marketing at Arteris IP has written a White-Paper 'How to efficiently achieve ASIL-D compliance using NoC technology', and discusses the details with Bernard Murphy in this SemiWiki blog:

Supporting ASIL-D Through Your Network on Chip 

September 20th,  2018 - By Bernard Murphy

ASIL-D compliance for safety (the top-level of safety)  in automotive applications has become much more prominent as a requirement than we might have expected. Bernard Murphy (SemiWiki) provides his take after reading Kurt Shuler’s white-paper on how the NoC interconnect connecting IPs can help meet this goal and why this approach to safety in integration is more efficient than some frequently discussed alternatives.

Topics: SoC semiwiki kurt shuler safety culture ISO 26262 ASIL D NoC compliance semiconductor ISO 26262 certification ASIL-B failure mitigation FMEDA

SemiWiki: ISO 26262: People, Process and Product

Kurt Shuler, VP Marketing at Arteris IP writes about the 3 P's of ISO 26262 in a White-paper and then chats with Bernard Murphy in this SemiWiki blog:

ISO 26262: People, Process and Product  

August 29th,  2018 - By Bernard Murphy

Bernard Murphy (SemiWiki) offers his review of Kurt Shuler's white-paper on what the ISO 26262 standard requires of IP vendors and chip integrators who depend on those vendors. He suggests that some may not fully understand the intent behind the standard and may be setting themselves up for problems downstream.

Topics: SoC semiwiki kurt shuler IP chip training safety culture QMS SPICE

Semiconductor Engineering: Not Enough Respect for SoC Interconnect

K. Charles Janac, CEO at Arteris IP, shares his opinion in this week's blog appearing in Semiconductor Engineering:

Not Enough Respect for SoC Interconnect

 

July 30th, 2018 - By K. Charles Janac

Topics: semiconductor engineering arteris ip SoC semiconductor interconnects logic flexnoc interconnect topologies ips IP modules SoC assembly advanced driver assistance systems adas K. Charles Janac AI on-chip memory 5G mobility soc architecture QoS functional safety SoC security