Arteris Articles

Semiconductor Engineering: Maximizing Value Post-Moore's Law

Kurt Shuler, Vice President of Marketing at Arteris IP quoted in this new article in Semiconductor Engineering:

Maximizing Value Post-Moore's Law

July 13th, 2020 - By Brian Bailey

The value of a semiconductor can be difficult to measure because it involves costs and benefits over time. As market segments feel different pressures, maximizing value is going in several directions. 

 
“Assessing value is really hard because it is over the lifetime,” says Kurt Shuler, vice president of marketing at Arteris IP. “A lot of chips are disposable. Consider your cell phone. You don’t really care if it’s working 10 years from now. For the data center guys and the AI chips, it’s the same thing. Certain industries do want that chip to last for 15 or 20 years, and that’s automotive, industrial — those kinds of things where there’s a huge capital cost component to that piece of equipment and people are not going to be throwing it away.
 
Topics: SoC IoT ADAS NoC technology semiconductor engineering soc architecture AI kurt shuler data centers noc interconnect IP market chip costs

Semiconductor Engineering: Designing For Extreme Low Power

Kurt Shuler, Vice President of Marketing at Arteris IP comments in this new article in Semiconductor Engineering:

Designing For Extreme Low Power

July 9th, 2020 - By Brian Bailey

Power is becoming a differentiator in many designs, and for IoT and edge devices it may be the most important competitive differentiation. 

 
Most IoT edge devices are basically fairly similar. “The chip basically has sensing, processing and communication,” says Kurt Shuler, vice president of marketing at  Arteris IP . “There is usually one sensor, or multiple sensors attached to it. These things are polling or communicating periodically. They usually have a part of the chip that they call ‘always on’, even though it’s not always on. It’s doing the communications and checking to see if there’s anything from a sensor. Compared to a mobile phone, or some AI chips or an ADAS chip, these chips are not huge. These are really tiny chips, but the power management within them is really complex.”
 
Topics: SoC IoT ADAS NoC technology semiconductor engineering soc architecture kurt shuler noc interconnect IP market

Semiconductor Engineering: What Makes A Good Accelerator

Kurt Shuler, VP of Marketing at Arteris IP, comments on 'What needs to be accelerated' in this Semiconductor Engineering article:

What Makes A Good Accelerator

 

October 25th, 2018 - By Ann Steffora Mutschler

Topics: FPGAs machine learning neural network semiconductor engineering soc architecture arteris ip SoCs

Semiconductor Engineering: Not Enough Respect for SoC Interconnect

K. Charles Janac, CEO at Arteris IP, shares his opinion in this week's blog appearing in Semiconductor Engineering:

Not Enough Respect for SoC Interconnect

 

July 30th, 2018 - By K. Charles Janac

Topics: SoC functional safety SoC security semiconductor advanced driver assistance systems adas flexnoc interconnect semiconductor engineering soc architecture AI arteris ip ips K. Charles Janac on-chip memory interconnects logic IP modules SoC assembly topologies 5G mobility QoS