Arteris Articles

ElectronicDesign Article: Speed Machine-Learning Accelerators with Flexible Interconnect


This ElectronicsDesign article, 'Speed Machine-Learning Accelerators with Flexible Chip Interconnect', covers the announcement of Arteris IP's new FlexNoc with AI Package in this interview with Kurt Shuler, VP Marketing at Arteris IP. 

November 1 , 2018 - By William Wong

Topics: OEMs SoCs noc multicast AI FlexNoC AI chips broadcast torus noc autonomous vehicles VC-Links

EE Times article, "Who's Who in AI SoCs," highlights Arteris IP

This EE Times article, "Who's Who in AI SoCs", highlights Arteris IP's role in artificial intelligence (AI) and machine learning (ML) chips in this interview with Kurt Shuler, VP Marketing at Arteris IP. 

November 1, 2018 - by Junko Yoshida

Topics: eetimes OEMs automotive design SoCs noc multicast AI FlexNoC AI chips DNN broadcast

EE Times Designlines Blog: How to Not Fail ISO 26262

This EE Times blog in Designlines Automotive titled, How to Not Fail ISO 26262, is written by Kurt Shuler, VP Marketing at Arteris IP. 

Topics: eetimes OEMs tier 1 automotive design ADAS SoCs 3D mapping mobileye functional safety interconnects ISO 26262 ASIL D safety culture people process

EE Times Designlines Blog: Auto OEMs, Tier-Ones: Think SoC Designs

This EE Times blog in Designlines Automotive titled, Auto OEMs, Tier-Ones: Think SoC Designs, is written by Kurt Shuler, VP Marketing at Arteris IP. 

Topics: eetimes OEMs tier 1 automotive design ADAS SoCs LIDAR 3D mapping mobileye functional safety interconnects