Arteris Articles

EE Times article, SoC Interconnect: Don't DIY!

Kurt Shuler, VP Marketing at Arteris IP, explains why a DIY approach to building your own configurable interconnect IP product is not as easy as one may think.

June 13, 2019 - by Kurt Shuler

The recent market consolidation might have some companies considering whether this is a do-it-yourself (DIY) project that your company should consider taking on. Whether it’s a simple crossbar switch or a full-function network-on-chip (NoC) architecture for advanced SoCs, all that’s needed are the right people with the right knowledge and a big budget; eventually, it could happen. But the question isn’t can you do it? It’s should you do it?

Topics: semiconductor eetimes autonomous vehicles AI automotive design SoCs kurt shuler noc interconnect ML/AI

Arteris IP is Presenting at The Linley Spring Processor Conference April 10 - 11, 2019!


Don't Miss the Arteris IP Presentation on AI SoC Architectures, Thursday, April 11, 2019 

Location: Hyatt Regency, Santa Clara, CA
Session 5: SoC Design: Thursday, April 11
1:15 pm - 2:45 pm

Arteris IP presenting: "Adapting SoC Architectures for Types of Artificial-Intelligence Processing"

Come to the Linley Spring Processor Conference on April 10 - 11, 2019  - and attend the Arteris IP presentation on Thursday, April 11 during Session 5: SoC Design, were we will describe lessons learned on how to use network-on-chip (NoC) technology to efficiently implement SoC architectures targeted for different types of AI processing, including advanced techniques like when to use tiling or cache coherence, whether for edge/battery-operated or datacenter chips. 

April 11 Agenda: https://www.linleygroup.com/events/agenda.php?num=46&day=2

Topics: NoC semiconductor ArterisIP artificial intelligence SoCs edge/battery-operated cache coherence datacenter chips

SystemC Gurus Wanted! Arteris IP is Hiring Performance Modeling Engineers

Featured Position!

Performance Modeling Engineer
in Campbell, CA or Austin, TX

Would you like to be part of a team creating products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

We are growing our Performance Team to develop models for our next generation product.

Topics: AXI OCP ASIC design cache coherency system level modeling SystemC arteris ip SoCs noc interconnect job CHI

Arteris IP perspective on EE Times, "Facebook Buys Interconnect IP Vendor Sonics"

Junko Yoshida from EE Times wrote an insightful article titled, "Facebook Buys Interconnect IP Vendor Sonics," that does a really good job explaining the changes in the semiconductor industry and exploring why big companies like Intel and Facebook are buying interconnect IP companies. 

Topics: acquisitions semiconductor eetimes autonomous vehicles AI SoCs facebook sonics intel