Arteris Articles

Arteris IP at DATE 2019

Arteris IP at DATE 2019 

Location: Firenze Fiera, Florence, Italy
3.1 Executive Session 2: Panel
Date:
Tuesday, 26 March 2019
Time: 14:30 - 16:00
Location: Room 1

Arteris IP's CEO, K. Charles Janac joins this Executive Panel Session, "Semiconductor IP, Surfing the Next Big Wave"

Topics: FPGA semiconductor Soft IP SoCs noc interconnect hard ip

Arteris IP is Hiring!

Performance Modeling Engineer
in Campbell, CA or Austin, TX

Would you like to be part of a team contributing to products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

Topics: AXI OCP ASIC design cache coherency arteris ip hardware SoCs noc interconnect job

EE Times article, "AV Safety Ventures Beyond ISO 26262"

Kurt Shuler, VP Marketing at Arteris IP, was interviewed and quoted in this interesting article on the new SOTIF ISO/PAS 21448:2019 specification. 

March 5, 2019 - by Junko Yoshida

Close vote
Kurt Shuler, vice president of marketing at Arteris, said that it was a “close vote” at the ISO 26262 meeting when the group decided to develop SOTIF as a separate standard. Skeptics questioned the need, he noted. Citing “known unknowns” and “unknown unknowns,” Shuler acknowledged, “We are getting into the realm of Donald Rumsfeld,” the former United States Secretary of Defense.

Topics: semiconductor eetimes autonomous vehicles ISO 26262 specification AI automotive design SoCs kurt shuler edge

Arteris IP at Synopsys Users Group Silicon Valley 2019


Arteris IP at SNUG Silicon Valley 2019 

Location: Santa Clara Convention Center, 5001 Great America Parkway, Santa Clara, CA  
Track: Artificial Intelligence - Wednesday, 20 March, 3:45 pm - 4:30 pm

Arteris IP is presenting this paper, "Using Machine Learning for Characterization of NoC Components"

Topics: NoC semiconductor FlexNoC Soft IP SoCs RTL noc interconnect ML PPA