Arteris Articles

Semiconductor Engineering: Big Shift In Multi-Core Design

 Arteris IP's Kurt Shuler, Vice President of Marketing, adds commentary in this article in Semiconductor Engineering.

Big Shift In Multi-Core Design

April 3rd, 2019 - By Ann Steffora Mutschler

System-wide concerns in AI and automotive are forcing hardware and software teams to work together, but gaps still remain.

Minding the gap
There are indications that mindset is beginning to change, particularly in markets such as automotive where systemic complexity extends well beyond a single chip or even a single vehicle.

“In the past, if you were a software engineer, the thinking was, ‘I have this chip available. Here’s what I can produce with my software,'” said Kurt Shuler, vice president of marketing at Arteris IP. “Nowadays, especially in the ADAS side of things that have an AI component or some kind of programmable object detection for the ADAS functionality, or an AI chip—whether it’s for the data center, edge, inference or training—the thinking has shifted more to system-design decisions. If this is designed with this given set of software algorithms, it is clear what needs to happen at a system level from the hardware and software point of view. At what level of detail should I optimize this hardware for the particular software I expect to run? This means the hardware and the software are now much more tightly integrated in those use cases than they probably have ever been unless it’s a very detailed embedded application. So now, in the early stages of design for these types of chips, whether it’s the autonomous driving chips or the AI chips, the software architect is in there, too.”

This is a definite sign of progress. “Before, they didn’t care,” Shuler said. “The layer/API between hardware and software is becoming less generic and more specific for those kinds of use cases, solving those kinds of problems. What that means, though, is there are software guys who went to Stanford and trained on Java script and have no idea what a register is. Then there are hardware guys who have no idea what a hypervisor or object-oriented programming is.”

For more information on AI, please click on the Arteris FlexNoC AI Package webpage: http://www.arteris.com/flexnoc-ai-package.

Topics: SoC software automotive ADAS autonomous driving semiconductor engineering AI hardware noc interconnect

Advanced SoC Interconnect IP Enables Greater Flexibility in an Era of Consolidation

I am thoroughly enjoying 2013. That’s because there seems to be a lot more reason for optimism this year than last year.  But before we let go of 2012, it’s important to reflect on the past year and see what it can teach us so we can make better business decisions moving forward.

Topics: semiconductor industry SoC economics IP economics intellectual property semiconductor industry economics NoC software network-on-chip network-on-chip research ASICs ASIC design FPGAs field programmable gate arrays FPGA design cores on-chip interconnect

Who REALLY calls the shots in chip design today?

Who REALLY calls the shots in chip design today?

That sounds like a stupid question. Who really calls the shots in chip design today? Well, chip designers of course.

Topics: semiconductor industry SoC economics economics software

IP Subsystems Are Nothing New

As featured in:
I’ve been hearing the term “IP subsystem” lately, and it seems to be the latest newfangled buzz word in the SoC semiconductor and IP industry, second only to “virtualization.” Much of the context for this growing interest in IP subsystems has been inspired from the work of Rich Wawrzyniak in his Semico Research report, “IP Subsystems: The Next IP Market Paradigm – October 2010.”

Topics: IP subsystems Semico ARC analog software TI OMAP