Arteris Articles

Arteris and Synopsys Webinar Held on Wednesday, 26 September

synopsys_color_600pxHolger Keding (Synopsys' Solutions Architect), Rocco Jonack (Arteris' Senior Solutions Architect) and Malte Doerper (Synopsys' Product Marketing) will be jointly hosting this webinar,
"Optimization of Cache Coherent Interconnects for Artificial Intelligence SoCs",
on Wednesday, 26 September, at 10 am Pacific time.

Topics: Synopsys cache coherent interconnect artificial intelligence SoCs webinar architect

IEEE Electronics 360: How to Efficiently Achieve ASIL-D Compliance Using NoC Technology

Learn from the experts at Arteris IP in this new White Paper:

How to Efficiently Achieve ASIL-D Compliance Using NoC Technology

 

 

 

Topics: arteris ip semiconductor interconnects artificial intelligence ASIL D ISO 26262 compliance soc designers ADAS functional safety automotive aerospace aeronautics LED latency SoC economics kurt shuler Z01X Synopsys Austemper

New Synopsys verification solution integrates with Arteris Ncore cache coherent interconnect

Synopsys announced their new cache coherent subsystem verification solution which integrates with Arteris Ncore: Synopsys Delivers Industry's First Cache Coherent Subsystem Verification Solution for Arteris Ncore Interconnect.

Topics: Synopsys hardware verification Ncore

The Semiconductor Industry Needs an IP Switzerland

It’s official: The great IP land grab has begun.

The process actually has been taking place gradually, but has accelerated with Imagination Technologies’ acquisition of MIPS last year and, most recently, Cadence’s acquisition of Tensilica. For makers of semiconductors, four competing IP behemoths are emerging after years of fragmentation within the semiconductor IP industry.

Topics: semiconductor industry IP protocols semiconductor IP Synopsys intellectual property ARM MIPS Cadence Imagination semiconductor industry economics