Arteris — The Company

Arteris provides SoC interconnect IP and tools based on its Network-on-Chip (NoC) architecture.

The Arteris Network-on-Chip (NoC) architecture borrowed the applicable concepts from the computer networking arena and adapted them to IC design constraints. This solution ensures a balanced tradeoff between performance, silicon area, and power, and reflects an in-depth understanding and integration of the constraints imposed by SoC implementations and semiconductor processes.

Network-on-Chip is a new technology that started in research in the mid 1980s and reached maturity around 2003. Arteris pioneered the commercial NoC offering, led the mass market adoption of Network-on-Chip solution and is the market leader in this space.

By removing the inherent architectural limitations of traditional interconnect solutions, Arteris Network-on-Chip offers a quantum leap in all aspects of the design quality and productivity, allowing SoC designers to achieve their ultimate design goal.

Key benefits of Arteris interconnect solution include:

• Improved performance, power and silicon area
  • Winning all benchmarks against internal & competitive approaches
• Highly scalable to support a wide range of performance and complexity levels
  • Easy-to-use solution for simple designs with a handful of IPs to complex SoCs with hundreds of IPs
• Shortened development times with the advanced tool suite and architecture features
  • Providing certainty in tape out schedule by allowing faster and easier timing closure