ISO 26262 System-on-chip (SoC) safety analysis for ADAS and AV

The role of simulation in system-level validation and evaluating fault tolerance trade-offs

Download this 98-slide conference presentation titled, "Workshop: ISO 26262 System-on-chip (SoC) safety analysis for ADAS and AV: The role of simulation in system-level validation and evaluating fault tolerance trade-offs”, presented by Arteris IP VP of Marketing Kurt Shuler, Diego Botero, Arteris AE, and  Francesco Rossi (ResilTech) at the Automotive IQ 8th Annual ISO 26262 for Conference in Dusseldorf, Germany.

Includes:2018-03-16-Arteris-IP-ResilTech-AutomotiveIQ-ISO-26262-Dusseldorf-IQPC-opt-FINAL 67-067-4002x2252-border

    • Conference presentation, 98 slides 
    • Abstract: 3 hour workshop: Automotive Tier-1 engineers often have much experience dealing with systems at the board level, but must have more insight into complex multicore SoC design and be able to interpret and make use of safety metrics (FMEA, DFA, FMEDA) provided to users of these SoCs. This workshop explains how SoC integrators determine these metrics using EDA simulations, and how system design teams can take advantage of these results to optimize the system-level safety concept: Obtain visibility on fault criticality / grading and safety cases – Making availability trade-offs; Optimizing fault reaction strategy - Hardware vs. software; Increase fault tolerance at the system level
    • Presenters: Kurt, Diego, and Francesco Rossi (ResilTech) 

 

 

    

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