NoC glossary of terms
AMBATM: Advanced Microprocessor Bus Architecture, a group of bus protocols commonly used in ARM-based systems.
AHB: AMBA High-Performance Bus, a single-cycle fixed pipeline synchronous bus part of the AMBA architecture, also referred to as AMBA 2.0
AXI: Advanced eXtensible Interface: an IP core socket protocol with flexible pipelining, separate address and data channels, and out of order support, also referred to as AMBA 3.0. AXI-compliant IP cores can be connected together by an AXI-compliant interconnect.
Burst: In a bus or socket protocol, the successive transfer of several data words whose addresses are related (for example, follow each other).
GALS: Globally Asynchronous, Locally Synchronous: a SoC implementation strategy whereby the SoC is divided into synchronous subsystems communicating together using asynchronous techniques. This strategy keeps the efficiency (both in gate count and in implementation time) of synchronous implementation design flow at local level, while removing the need for global timing convergence of the full SoC.
Latency: The amount of time spent between a request from an IP core (for example, a CPU requesting data from memory) and the arrival of the corresponding response from the target of the request (arrival of the data to the CPU). Includes the time to transfer the request to the target, for the request to be processed by the target, and to transfer the response to the requestor, and can be measured in nanoseconds or in cycles if the system has a single clock.
Link: In a Network-on-Chip, the physical implementation of the connection between two units (such as switches), over which packets are transferred between these units.
Mesochronous Link: A special type of link used in GALS strategy for long-distance links. Units (such as switches) connected to a mesochronous link may have unrelated clocks.
NIU: Network Interface Unit : in a Network-on-Chip, the unit that makes the conversions between native IP core transactions and the NoC transaction layer, i.e. manages the packetization of IP transactions. NIUs can connect the NoC to IP cores complaint with AMBA, OCP or other bus or socket protocols.
NoC: Network-on-Chip. An architecture of communication infrastructure between IP cores that borrows techniques from data networks such as packetization, packet routing, etc.
NTTP: NoC Transaction and Transport Protocol.The internal packet-based protocol used for communications between Network Interface Units of Arteris NoC. NTTP has three layers: a transaction layer enabling compatibility with IP core native transactions (load/store, bursts), a packet-based transport layer, and physical implementation layer.
OCP: Open Core Protocol. A configurable pipelined IP socket protocol with separate address and data channels and out-of-order capabilities, managed by the OCP-IP organization.
Packet: A self-contained set of information that is routed through the NoC switch fabric and is part of a transaction between two NIUs. A packet contains a header describing packet type and addressing information, and an optional payload.
Packetization: The act of transforming a native IP core transaction into packets. Packetization is performed by NIUs, as well as the reverse operation (unpacketization).
Service network: A low-cost serial network used to provide runtime services to the NoC, such as register access, debug services, etc.
SoC: System-on-Chip: A semiconductor design that is built of many IP cores (for example processors, DSPs, memories, I/O interfaces, etc.) that communicate together using transactions over a dedicated communication infrastructure.
Switch: An active NoC unit that routes packets between NIUs.
Switch Fabric: The combination of NoC switches interconnected by links according to a given topology.
Topology: The shape or organization of the switch fabric. Switches and links can be organized in regular topologies (for example, 2-D meshes where each switch is connected to a certain number of its closest neighbors, or trees where each switch connects to a parent and several children), or ad-hoc topologies reflecting traffic patterns between the IP cores.
Transaction: A data exchange between two IP cores, an initiator and a target. A transaction can typically be a burst and be comprised of several phases, such as a request and a response. Since a transaction between IP cores requires a similar data exchange on the communication infrastructure (bus or NoC), by extension "transaction" also refers to the data exchange between bus interfaces or NIUs.
Transport: The action of moving a packet across the switch fabric.