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Kurt Shuler

Kurt Shuler

Recent Posts by Kurt Shuler:

SemiWiki: On-Chip Networks at the Bleeding Edge of ML

On-chip networks become a lot more challenging at the high-end of machine learning (ML). Bernard Murphy (SemiWiki) talked with Kurt Shuler, VP Marketing at Arteris IP, about the experience they have developed over the years of working with well-known ML product builders and how this has influenced  the AI package recently released by Arteris IP in this SemiWiki blog:

On-Chip Networks at the Bleeding Edge of ML 

November 29th,  2018 - By Bernard Murphy

I wrote a while back about some of the more exotic architectures for machine learning (ML), especially for neural net (NN) training in the data center but also in some edge applications. In less hairy applications, we’re used to seeing CPU-based NNs at the low end, GPUs most commonly (and most widely known) in data centers as the workhorse for training, and for the early incarnations of some mobile apps (mobile AR/MR for example), FPGAs in applications where architecture/performance becomes more important but power isn’t super-constrained, DSPs in applications pushing performance per watt harder and custom designs such as the Google TPU pushing even harder.

Topics: SoC semiwiki kurt shuler NoC semiconductor machine learning FPGAs AI chips FlexNoC flexnoc ai package

Arm and Arteris IP present AI NPU and ISO 26262 integration together at ICCAD China

On Friday, Jerry Shu, Senior Manager for Automotive Marketing at Arm and Gary Ge, Senior Solutions Architect at Arteris IP, jointly presented "Implementing ISO 26262 Compliant AI Systems with Arm and Arteris IP" to an audience at the ICCAD China conference in Zhuhai China.

Topics: AI FlexNoC AI chips ISO 26262 Arm NPU Arm Cortex

ElectronicDesign Article: Speed Machine-Learning Accelerators with Flexible Interconnect


This ElectronicsDesign article, 'Speed Machine-Learning Accelerators with Flexible Chip Interconnect', covers the announcement of Arteris IP's new FlexNoc with AI Package in this interview with Kurt Shuler, VP Marketing at Arteris IP. 

November 1 , 2018 - By William Wong

Topics: OEMs SoCs noc multicast AI FlexNoC AI chips broadcast torus noc autonomous vehicles VC-Links

EE Times article, "Who's Who in AI SoCs," highlights Arteris IP

This EE Times article, "Who's Who in AI SoCs", highlights Arteris IP's role in artificial intelligence (AI) and machine learning (ML) chips in this interview with Kurt Shuler, VP Marketing at Arteris IP. 

November 1, 2018 - by Junko Yoshida

Topics: eetimes OEMs automotive design SoCs noc multicast AI FlexNoC AI chips DNN broadcast

Arteris IP Announces New FlexNoC® 4 Interconnect IP with Artificial Intelligence (AI) Package

Industry leading commercial interconnect IP accelerates development of next-generation deep neural network (DNN) and machine learning systems

CAMPBELL, Calif. – October 31, 2018 – Arteris IP, the world’s leading supplier of silicon-proven commercial network-on-chip (NoC) interconnect intellectual property (IP)today announced the new Arteris IP FlexNoC version 4 interconnect IP and the companion AI Package. FlexNoC 4 and the AI Package (“FlexNoC 4 AI”) implement many new technologies that ease the development of today’s most complex AI, deep neural network (DNN), and autonomous driving systems-on-chip (SoC).

Numerous startups are attempting to develop SoCs for neural-network training and inference, but to be successful, they must have the interconnect IP and tools required to integrate such complex, massively parallel processors while meeting the requirements for high-bandwidth on-chip and off-chip communications. Arteris IP has the experience and interconnect IP to help these companies succeed, and FlexNoC 4 with the AI Package provides the features required for AI chips in an easy-to-use and highly configurable form.


Mike Demler, Senior Analyst and Senior EditorThe Linley Group & Microprocessor Report

Topics: AI chips SoC design training chips QoS neural network new product flexnoc ai package noc multicast mesh noc ring noc torus noc machine learning artificial intelligence

Semiconductor Engineering: What Is SOTIF?

Kurt Shuler, VP of Marketing at Arteris IP, discusses the new ISO/PRF PAS 21448 Safety of the Intended Functionality (SOTIF) specification in this new video with Ed Sperling of Semiconductor Engineering:

What Is SOTIF?

 

October 10th, 2018 - By Ed Sperling

Topics: semiconductor engineering arteris ip semiconductor interconnects safety culture OEMs ADAS systems diagnostics

Arteris IP FlexNoC® Interconnect IP Licensed by Iluvatar CoreX for Artificial Intelligence Application

 

CAMPBELL, Calif. – October 16, 2018– Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Iluvatar CoreX has licensed Arteris IP FlexNoC Interconnect for a deep learning SoC application. Iluvatar CoreX is a company focused on designing high-end / cloud computing chips and computing infrastructure software, with R&D centers in Nanjing, Shanghai, Beijing, and Silicon Valley.

We chose the Arteris FlexNoC cache coherent interconnect because of its design flexibility and market leading power, performance and area results. Using FlexNoC interconnect IP will allow us to get exactly the type of interconnect that we need for our SoCs, backed up by strong local support.”


Yunpeng Li, Chairman and CEO, Iluvatar CoreX

Topics: new customer AI chips SoC design china neural network deep learning neural networks flexnoc interconnect

Arteris IP FlexNoC® Interconnect IP Licensed by Enflame (Suiyuan) Technology for Multiple Artificial Intelligence (AI) Chips

Network-on-Chip (NoC) interconnect IP provider enables faster AI training in cloud datacenter

CAMPBELL, Calif. – October 9, 2018 – Arteris IP, the world’s leading supplier of silicon-proven commercial network-on-chip(NoC) interconnect intellectual property (IP), today announced that Enflame (Suiyuan) Technology has purchased multiple licenses of Arteris FlexNoC interconnect IP for use as the on-chip communications backbone of their artificial intelligence (AI) training chips for use in cloud datacenters.

Arteris FlexNoC interconnect IP is the only interconnect that would allow our AI chips to achieve their high bandwidth requirements while also meeting our QoS requirements. Using Arteris NoC technology allows our architecture to take maximum advantage of state-of-the-art HBM2 memories to avoid system-level data starvation, which is major problem with less efficient AI training chips.”


Arthur Zhang, COOEnflame

Topics: new customer AI chips SoC design training chips QoS china neural network

Arteris IP FlexNoC® Interconnect and Resilience Package Licensed by Autotalks for Automotive V2X Communications Chipsets

ISO 26262-compliant interconnect IP enables next generation Vehicle-to-Everything (V2X) communications technology

CAMPBELL, Calif. — October 2, 2018 — Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip(NoC) interconnect intellectual property, today announced that Autotalks has purchased the Arteris IP FlexNoC Interconnect and the companion FlexNoC Resilience Package. This portfolio of Arteris IP interconnect technology will be the on-chip communications backbone of Autotalks’ next-generation ISO 26262 compliant system-on-chip (SoC) devices.

Our V2X communications chipsets require a very high degree of on-chip integration while being able to meet rigorous functional safety, power consumption and performance requirements. Arteris IP technology allowed us to ease our readiness for ISO 26262 compliance process which is required for autonomous vehicles, platooning applications and for other future applications.”


Hagai Zyss, CEOAutotalks

Topics: flexnoc interconnect flexnoc resilience package iso 26262 ASIL new customer

Arteris IP Ncore® and FlexNoC® Interconnects and Resilience Packages Licensed by Mobileye for AI-Powered EyeQ Chips

Next generation ASIL B(D) autonomous driving systems to be enabled by ISO 26262-compliant cache coherent and non-coherent interconnect IP

CAMPBELL, Calif. — July 10, 2018 — Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip(NoC) interconnect intellectual property, today announced that Mobileye has purchased multiple licenses of Arteris IP Ncore Cache Coherent Interconnect, FlexNoC Interconnect, and the Ncore and FlexNoC Resilience Packages for functional safety and artificial intelligence (AI) hardware acceleration. This broad portfolio of Arteris IP interconnect technology will be the on-chip communications backbone of Mobileye’s next-generation ISO 26262 ASIL B(D) capable next generation EyeQ system-on-chip (SoC) devices.

We chose the Arteris Ncore cache coherent interconnect because of its unique proxy caches and their ability to underpin high-performance, low power, cache coherent clusters of our unique AI accelerators. And with our prior experience using FlexNoC and the FlexNoC Resilience Packages for functional safety, we trust Arteris IP to be the highest performing and safest choice for ISO 26262-compliant NoC IP.”


Elchanan Rushinek, Vice President of EngineeringMobileye

Topics: mobileye ncore resilience package ncore cache coherent interconnect flexnoc interconnect flexnoc resilience package eyeq iso 26262 ASIL new customer