Latest News

Semiconductor Engineering: CEO Outlook: 2020 Vision

 Arteris IP's CEO, Charlie Janac, is quoted in a 2020 survey of CEOs from across the country in this Semiconductor Engineering article:

CEO Outlook: 2020 Vision

January 6th, 2020 - By Ed Sperling

5G, China and AI are prominent, but big changes are coming everywhere.

 

“In 2020, highway driving starts to become real for autonomous vehicles,” said K. Charles Janac, CEO of ArterisIP. “You’re also going to see more applications for machine learning and AI emerge. Right now, there is too much money being spent on this by big Internet companies that are doing a lot internally. Those investments will shift. You’ll also see 5G becoming very important. We will need that for the last mile. The other killer app is cyber security, and this is one that is somewhat worrisome because we’re starting to see 5G and machine learning being used to track entire populations.”

To learn more, please download this Technical Paper on "Re-Architecting SoCs for the AI Era", please go here; https://www.arteris.com/download-re-architecting-socs-for-the-ai-era

Topics: SoC Networks-On-Chip autonomous vehicles semiconductor engineering arteris ip K. Charles Janac charlie janac noc interconnect ML/AI 5G cyber security

Arteris IP Awarded "Best Ecosystem Partner of 2019" by AI Pioneer Canaan

Last month, Canaan Inc. successfully went public with an IPO on Nasdaq. And just last week, our Arteris IP team was invited to attend a grand dinner to celebrate this wonderful achievement. During the dinner, Arteris IP was awarded by Canaan the "Best Ecosystem Partner of 2019 Award" which Rick Sun, our China Sales Manager (second from the right in the above photo) is holding. 

The entire Arteris IP team is proud that our efforts have helped contribute to Canaan's success on their AI chip, and we we look forward to more activities with them as they continue their explosive growth. This award is a testament not only to our products and technologies, but also the excellent Arteris IP team members supporting our customers worldwide.

Topics: semiconductor machine learning artificial intelligence AI SoCs flexnoc ai package noc interconnect ML

SemiWiki: Autonomous Driving Still Terra Incognita

A panel at Arm TechCon reviewed where we're at in self-driving. Andrew Hopkins or Arm, Kurt Shuler of Arteris IP, Martin Duncan of ST, Hideki Sugimoto of NSITEXE/DENSO and Mike Demler of The Linley Group, moderated the debated the practicalities.  Bernard Murphy of SemiWiki provides his take on the discussion in this new blog:

Autonomous Driving Still Terra Incognita

December 12th, 2019 - By Bernard Murphy

I already posted on one automotive panel at this year’s Arm TechCon. A second I attended was a more open-ended discussion on where we’re really at in autonomous driving. Most of you probably agree we’ve passed the peak of the hype curve and are now into the long slog of trying to connect hope to reality. There are a lot of challenges, not all technical; this panel did a good job (IMHO) of exposing some of the tough questions and acknowledging that answers are still in short supply. I left even more convinced that autonomous driving is still a hard problem needing a lot more investment and a lot more time to work through.

You can learn more about this by downloading the Arm TechCon presentation HERE.

Topics: SoC ARM semiconductor automotive flexnoc resilience package The Linley Group automotive functional safety ArterisIP ISO 26262 compliance artificial intelligence AI semiwiki kurt shuler noc interconnect SOTIF (ISO 21448 UL 4600

Join the Arteris IP Team in Silicon Valley!

Featured Position!

Senior Software Engineering Manager in 
Campbell, CA


We are looking for an experienced Senior Software Engineering Manager who will report to the VP of Engineering. 

Our current product is powering the creation of the most advanced artificial intelligence, mobile phone, and self-driving car SoCs.

You, as a successful candidate, are dynamic and self motivated with excellent organizational, and technical skills who can effectively communicate across all levels of management.

Topics: software jobs ASIC design arteris ip noc interconnect job SoC designs C++ Java

SemiWiki: Evolving Landscape of Self-Driving Safety Standards

Think you know all about automotive safety and electronics? Think again. Bernard Murphy of SemiWiki gets an education from Kurt Shuler, VP Marketing at Arteris IP, on how the safety standards picture is becoming more complex as we factor in self-driving in this new blog:

Evolving Landscape of Self-Driving Standards

November 14th, 2019 - By Bernard Murphy

I sat in a couple of panels at Arm TechCon this year, the first on how safety is evolving for platform-based architectures with a mix of safety-aware IP and the second on lessons learned in safety and particularly how the industry and standards are adapting to the larger challenges in self-driving, which obviously extend beyond the pure functional safety intent of ISO 26262. Here I want to get into some detail on this range of standards because we’re going to need to understand a lot more about these if we want to be serious about autonomous cars.

You can learn more about this by downloading the Arm TechCon presentation HERE.

Topics: SoC ARM semiconductor automotive flexnoc resilience package automotive functional safety ArterisIP ISO 26262 compliance artificial intelligence AI semiwiki kurt shuler noc interconnect SOTIF (ISO 21448 UL 4600

Arteris IP Ncore® Cache Coherent Interconnect Licensed by Bitmain for Sophon TPU Artificial Intelligence (AI) Chips

Network-on-chip (NoC) interconnect enables faster performance and lower die area for Tensor Processing Unit (TPU) AI/ML applications

CAMPBELL, Calif. June 9, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Bitmain has licensed Arteris Ncore Cache Coherent Interconnect IP for use in its next-generation Sophon Tensor Processing Unit (TPU) systems-on-chip (SoCs) for the scalable hardware acceleration of artificial intelligence (AI) and machine learning (ML) algorithms.

Our choice of interconnect IP became more important as we continued to increase the complexity and performance of Sophon AI SoCs. The Arteris Ncore cache coherent interconnect IP allowed us to increase our on-chip bandwidth and reduce die area, while being easy to implement in the backend. The Ncore IP’s configurability helped us optimize the die area of our SoC, which permits us to offer our users more performance at lower cost.”


Haichao Wang, CEO, Bitmain

Topics: SoC NoC new customer performance AI chips ML/AI scalable hardware on-chip bandwidth

Arteris IP FlexNoC® Interconnect Implemented in Uhnder Digital Automotive Radar-on-Chip

Austin-based startup uses Arteris IP interconnect to optimize on-chip communications for automotive radar-on-chip (RoC) systems

CAMPBELL, Calif. June 25, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Uhnder’s new automotive radar-on-chip (RoC) uses the Arteris FlexNoC IP as the on-chip interconnect.

Our choice of on-chip interconnect IP was very important to our success because of the unprecedented extent of on-chip integration and our huge bandwidth requirements. The Arteris FlexNoC interconnect IP helped us to surpass our performance goals while avoiding routing congestion in our tightly integrated single-chip radar.”


Manju Hedge, CEO and Cofounder, Uhnder

Topics: SoC NoC new customer machine learning autonomous driving flexnoc interconnect ML/AI on-chip communications automotive radar

Arteris® IP FlexNoC® Interconnect Licensed by Achronix for New Speedster®7t FPGA family

Network-on-chip (NoC) interconnect enables ASIC-like performance for Speedster7t FPGA family

CAMPBELL, Calif. — June. 18, 2019 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Achronix Semiconductor Corporation has licensed Arteris FlexNoC interconnect IP for use in its new Speedster7t FPGA family – based on a new, highly optimized architecture – that goes beyond traditional FPGA solutions featuring ASIC-like performance, FPGA adaptability and enhanced functionality to streamline designs.

Our new Speedster7t FPGA family requires extremely high on-chip bandwidth and advanced dataflow arbitration to make possible ASIC-class machine learning processing. The Arteris FlexNoC IP is the optimal interconnect to meet these demands, especially with the advanced process technology nodes and multi-gigahertz frequencies we are dealing with."


Steve Mensor, Vice President of Marketing, Achronix

Topics: SoC FPGA new customer machine learning artificial intelligence flexnoc interconnect ML/AI Achronix

Silicon-Proven Arteris IP Ncore ® Cache Coherent Interconnect Implemented in Toshiba ISO 26262-Compliant ADAS Chip

Toshiba tapes out next-generation automotive ADAS system-on-chip (SoC) using mature network-on-chip interconnect technology

CAMPBELL, Calif. — June. 11, 2019 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect semiconductor intellectual property, today announced that Toshiba has taped out its next generation automotive advanced driver assistance system (ADAS) chip using the Arteris IP Ncore Cache Coherent and FlexNoC®non-coherent interconnect with the associated Resilience Package.

Our use of the uniquely flexible Ncore cache coherent interconnect IP helped us to more quickly design and implement our next generation automotive ADAS chips while allowing us to increase hardware diagnostic coverage for ISO 26262 compliance. The Arteris IP team was very helpful in guiding us on the interconnect configuration to optimize system performance and hardware diagnostic coverage using the integrated functional safety mechanisms. Working with the highly professional Arteris team and their world class interconnect IP has helped us meet our performance requirements and schedule, while adding valuable capabilities that would not be possible with other interconnects.


Nobuaki Otsuka, Technology Executive at Electronic Device & Storage Corporation, Toshiba

Topics: SoC ISO 26262 automotive semiconductors japan flexnoc resilience package ADAS cache coherent interconnect advanced driver assistance systems adas imaging processor ncore cache coherent interconnect

Arteris IP and Wave Computing Collaborate on Reference Architecture for Enterprise Dataflow Platform

The Arteris FlexNoC Artificial Intelligence (AI) Package Coupled with Wave Computing's AI Systems and IP Technology Create a Unified Platform Optimized for AI Data Processing 

CAMPBELL, Calif. — May 21, 2019  Arteris IP, the world’s leading supplier of innovative silicon-proven network-on-chip (NoC) interconnect intellectual property (IP), and Wave Computing®, the Silicon Valley company accelerating artificial intelligence (AI) from the datacenter to the edge, are collaborating to create a blueprint that can help customers overcome compute-to-memory design challenges. Additionally, Wave Computing is licensing Arteris IP’s Ncore Cache Coherent Interconnect, FlexNoC interconnect IP, and its accompanying FlexNoC AI Package for use in the AI-enabled chips that fuel Wave Computing’s data center systems products. By working together to assimilate each other’s technology attributes, Wave Computing and Arteris can ensure the seamless flow of information enterprise-wide, helping speed time-to-insight.

Wave and Arteris have complementary compute and networking technologies that, when packaged together, address some of the key challenges facing system-on-chip designers today such as shorter product cycles and rapidly increasing product complexity. The world of AI demands greater compute power. Working with Arteris allows us to design a scalable data platform with blazing-fast performance at a cost-effective price that helps customers accelerate insight from the edge to the data center.”


Steve Brightfield, Senior Director, Strategic AI IP Marketing, Wave Computing

Topics: Arteris FlexNoC new customer artificial intelligence ncore cache coherent interconnect flexnoc ai package noc interconnect SoC designs datacenters