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Arteris IP FlexNoC® Interconnect Licensed by Baidu for Kunlun AI Cloud Chips for Data Center

NoC interconnect IP optimizes dataflow for revolutionary Cloud-To-Edge artificial intelligence (AI) system-on-chip (SoC) architecture

CAMPBELL, Calif. – January 15, 2019 – Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip(NoC) interconnect intellectual property, today announced that Baidu has licensed Arteris IP FlexNoC Interconnect for use in its high-performance Kunlun AI cloud chip for data center.

The Arteris FlexNoC interconnect IP helps us greatly by enabling not only high bandwidth on-chip communications but also load-balanced data traffic to off-chip memory, all while simplifying our backend timing closure. In addition, Arteris IP’s strong local support team has been a trusted partner in our AI chip development projects.


Jian Ouyang, Principal ArchitectBaidu

Topics: AI chips training chips neural network flexnoc ai package machine learning artificial intelligence Baidu china new customer

Semiconductor Engineering: AI Chips: NoC Interconnect IP Solves Three Design Challenges

 Arteris IP's Kurt Shuler warns that regular topologies, large chips, and huge bandwidths are considerations in AI-centric chips in the date center.

AI Chips: NoC Interconnect IP Solves Three Design Challenges  

January 10th,  2019 - By Kurt Shuler

New network-on-chip (NoC) interconnect IP is now available for artificial intelligence (AI) systems-on-chip (SoC). Arteris IP launched the fourth generation of FlexNoC interconnect IP with a new AI package.

The new NoC technology benefits emerging AI chip architectures in three main ways: automatically generating regular topologies, effectively managing the data flows of large chips with long wires and enabling large on- and off-chip bandwidths.

To learn more, please visit the FlexNoC AI Package page; https://www.arteris.com/flexnoc-ai-package and the Resources page: https://www.arteris.com/resources

Topics: AI chips semiconductor AI automotive neural networks ML AI SoC Designers flexnoc ai package VC-Links synchronous virtual channels noc interconnect

SemiWiki: Disturbances in the AI Force

Bernard Murphy (SemiWiki) reflects on a discussion with Kurt Shuler, VP Marketing at Arteris IP, on customer trends in design for advanced ML accelerators, why these look quite different from traditional processor architectures and the implication for design particularly around the NoC interconnect in this SemiWiki blog:

Disturbances in the AI Force

January 3rd, 2019 - By Bernard Murphy

In the normal evolution of specialized hardware IP functions, initial implementations start in academic research or R&D in big semiconductor companies, motivating new ventures specializing in functions of that type, who then either build critical mass to make it as a chip or IP supplier (such as Mobileye - initially) or get sucked into a larger chip or IP supplier (such as Intel or ARM or Synopsys). That was where hardware function ultimately settled, and many still do.

But recently the gravitational pull of mega-companies has distorted this normally straightforward evolution. In cloud services this list includes Amazon, Microsoft, Baidu and others. In smartphones you have Samsung, Huawei and Apple - yep, Huawei is ahead of Apple in smartphone shipments and is gunning to be #1. These companies, neither semiconductor nor IP, are big enough to do whatever they want to grab market share. What they do to further their goals in competition with the other giants can have a major impact on the evolution path for IP suppliers.

Arteris IP is closely involved with many of these companies, from Cambricon to Huawei/HiSilicon to Baidu to emerging companies like Lynxi, offering their network on chip (NoC) solutions with the AI package allowing for architecture tuning to the special needs of high-end NN designs. Check out more here; http://www.arteris.com/flexnoc-ai-package

Topics: semiwiki kurt shuler NoC semiconductor AI chips flexnoc ai package hardware ip accelerators noc interconnect

Semiconductor Engineering: Tech Talk - AI Training Chips Video

Kurt Shuler, VP of Marketing at Arteris IP, chat's about how to speed up algorithms and improve performance:

Tech Talk Video: AI Training Chips 


November 1,  2018 - By Ed Sperling

Ed Sperling interviews Kurt Shuler at Arteris IP headquarters about how to architect an AI training chip.

Arteris IP’s Kurt Shuler provides details about how different processing elements are used to accelerate training algorithms, and how to achieve improved performance .
Topics: tech talk video AI training AI chips semiconductor AI automotive IoT algorithms neural networks data centers

New Resources page on Arteris IP website (www.arteris.com/resources)

We've had a lot of requests for easier access to Arteris IP downloads and other online resources like product datasheets, technical papers, event presentations and proceedings, videos and newspaper articles. To help with this, I've created a resources page at http://www.arteris.com/resources.

Topics: arteris ip

Semiconductor Engineering: What Makes A Good Accelerator

Kurt Shuler, VP of Marketing at Arteris IP, comments on 'What needs to be accelerated' in this Semiconductor Engineering article:

What Makes A Good Accelerator

 

October 25th, 2018 - By Ann Steffora Mutschler

Topics: semiconductor engineering arteris ip SoCs neural network soc architecture FPGAs machine learning

Arteris IP Announces New FlexNoC® 4 Interconnect IP with Artificial Intelligence (AI) Package

Industry leading commercial interconnect IP accelerates development of next-generation deep neural network (DNN) and machine learning systems

CAMPBELL, Calif. – October 31, 2018 – Arteris IP, the world’s leading supplier of silicon-proven commercial network-on-chip (NoC) interconnect intellectual property (IP)today announced the new Arteris IP FlexNoC version 4 interconnect IP and the companion AI Package. FlexNoC 4 and the AI Package (“FlexNoC 4 AI”) implement many new technologies that ease the development of today’s most complex AI, deep neural network (DNN), and autonomous driving systems-on-chip (SoC).

Numerous startups are attempting to develop SoCs for neural-network training and inference, but to be successful, they must have the interconnect IP and tools required to integrate such complex, massively parallel processors while meeting the requirements for high-bandwidth on-chip and off-chip communications. Arteris IP has the experience and interconnect IP to help these companies succeed, and FlexNoC 4 with the AI Package provides the features required for AI chips in an easy-to-use and highly configurable form.


Mike Demler, Senior Analyst and Senior EditorThe Linley Group & Microprocessor Report

Topics: AI chips SoC design training chips QoS neural network new product flexnoc ai package noc multicast mesh noc ring noc torus noc machine learning artificial intelligence

Arteris IP FlexNoC® Interconnect IP Licensed by Iluvatar CoreX for Artificial Intelligence Application

 

CAMPBELL, Calif. – October 16, 2018– Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Iluvatar CoreX has licensed Arteris IP FlexNoC Interconnect for a deep learning SoC application. Iluvatar CoreX is a company focused on designing high-end / cloud computing chips and computing infrastructure software, with R&D centers in Nanjing, Shanghai, Beijing, and Silicon Valley.

We chose the Arteris FlexNoC cache coherent interconnect because of its design flexibility and market leading power, performance and area results. Using FlexNoC interconnect IP will allow us to get exactly the type of interconnect that we need for our SoCs, backed up by strong local support.”


Yunpeng Li, Chairman and CEO, Iluvatar CoreX

Topics: new customer AI chips SoC design china neural network deep learning neural networks flexnoc interconnect

Arteris IP FlexNoC® Interconnect IP Licensed by Enflame (Suiyuan) Technology for Multiple Artificial Intelligence (AI) Chips

Network-on-Chip (NoC) interconnect IP provider enables faster AI training in cloud datacenter

CAMPBELL, Calif. – October 9, 2018 – Arteris IP, the world’s leading supplier of silicon-proven commercial network-on-chip(NoC) interconnect intellectual property (IP), today announced that Enflame (Suiyuan) Technology has purchased multiple licenses of Arteris FlexNoC interconnect IP for use as the on-chip communications backbone of their artificial intelligence (AI) training chips for use in cloud datacenters.

Arteris FlexNoC interconnect IP is the only interconnect that would allow our AI chips to achieve their high bandwidth requirements while also meeting our QoS requirements. Using Arteris NoC technology allows our architecture to take maximum advantage of state-of-the-art HBM2 memories to avoid system-level data starvation, which is major problem with less efficient AI training chips.”


Arthur Zhang, COOEnflame

Topics: new customer AI chips SoC design training chips QoS china neural network

Arteris IP FlexNoC® Interconnect and Resilience Package Licensed by Autotalks for Automotive V2X Communications Chipsets

ISO 26262-compliant interconnect IP enables next generation Vehicle-to-Everything (V2X) communications technology

CAMPBELL, Calif. — October 2, 2018 — Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip(NoC) interconnect intellectual property, today announced that Autotalks has purchased the Arteris IP FlexNoC Interconnect and the companion FlexNoC Resilience Package. This portfolio of Arteris IP interconnect technology will be the on-chip communications backbone of Autotalks’ next-generation ISO 26262 compliant system-on-chip (SoC) devices.

Our V2X communications chipsets require a very high degree of on-chip integration while being able to meet rigorous functional safety, power consumption and performance requirements. Arteris IP technology allowed us to ease our readiness for ISO 26262 compliance process which is required for autonomous vehicles, platooning applications and for other future applications.”


Hagai Zyss, CEOAutotalks

Topics: flexnoc interconnect flexnoc resilience package iso 26262 ASIL new customer