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Semiconductor Engineering: Uses, Limits and Questions for FPGAs and Autos

Kurt Shuler, vice president of marketing at Arteris IP comments, he has seen that development is quickly moving in the direction of optimization with a lot of custom ASIC activity this Semiconductor Engineering article:

Uses, Limits and Questions for FPGAs and Autos

February 6th, 2020 - By Ann Steffora Mutschler

 

 

“Some companies are getting beyond the bounds of what can be done even in single die, looking at multidie solutions, but everything’s around optimization for power, bandwidth, latency, and functional safety,” Shuler said. “When you go to FPGA, the biggest issue is probably on the power side. Compared to a similar set of logic in ASIC versus doing an FPGA, you’ve got to basically turn on and off more transistors. That’s the underlying technical issue.

To learn more, please download this Technical Paper on "Re-Architecting SoCs for the AI Era", please go here; https://www.arteris.com/download-re-architecting-socs-for-the-ai-era

Topics: SoC Networks-On-Chip ASICs autonomous vehicles semiconductor engineering arteris ip kurt shuler noc interconnect ML/AI sensors

Arteris IP is Now Hiring a Functional Safety Manager in Campbell, CA

This is a New Featured Position!

Functional Safety Manager in Campbell, CA

Now is the time to join Arteris IP!

We are looking for an experienced Functional Safety Manager with strong quality process, hardware, and technical leadership skills to lead our ISO 26262 efforts. This person will create and execute CMMI-DEV quality processes resulting in Arteris IP products to be used in autonomous vehicles and other Functional Safety applications. He/She will also be the engineering lead for analysis of hardware IP functional safety mechanisms and designing methodologies and products to help automate that analysis.

Topics: software jobs ISO 26262 arteris ip noc interconnect job SoC designs leader IP design IEC 61508

Arteris® IP FlexNoC® Interconnect & Resilience Package Licensed by SiEngine for ISO 26262-Compliant Automotive Systems

State-of-the-art Network-on-Chip (NoC) interconnect increases chip performance, reduces design schedules, and provides functional safety mechanisms

CAMPBELL, Calif. – February 4, 2020 – Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that SiEngine has licensed the Arteris IP FlexNoC interconnect and the accompanying FlexNoC Resilience Package for use as the on-chip dataflow backbone of its next-generation automotive systems-on-chip (SoC).

We chose Arteris FlexNoC IP and the Resilience Package because of its integrated functional safety mechanisms and its ability to reduce on-chip routing congestion and increase performance. We are pleasantly surprised by the product’s rich functionality, flexible configuration and the excellent support from Arteris IP’s engineers, which allow us to achieve the specifically required functions with competitive performance.”


Xin-xin Yang, R&D Vice President, SiEngine

Topics: SoC NoC new customer automotive ISO 26262 resilience package performance AI chips ML/AI

Arteris IP is Now Hiring a Director of Software Development

This is a New Featured Position!

 Director of Software Development in Campbell, CA

Would you like to be part of a team contributing to products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

This management position reporting to the VP of Engineering requires a dynamic and self-motivated individual with excellent organizational, and technical skills who can effectively communicate across all levels of management. The ideal candidate will be an experienced leader who is visionary, strategic, technology savvy and skilled in contemporary software technologies and architectures. You will own and drive both development and quality engineering across multiple development teams.

Topics: software jobs arteris ip noc interconnect job SoC designs C++ Java leader IP design EDA director

Arteris IP is Hiring an Executive Legal Administrator / Paralegal in Campbell, CA

Featured Position!

Executive Legal Administrator / Paralegal in
Campbell, CA


Our Legal department seeks a Legal Administrator to join our dynamic, team-oriented group. This is a cross functional position with a leading international IP technology company working in a startup environment.

The ideal candidate has good corporate and commercial law experience, is extremely organized, tech savvy and proactive, with a desire to learn and grow, be customer-focused and collaborative.

Topics: arteris ip noc interconnect job legal team paralegal executive

Arteris IP Adds 17 New Licensees, Revenue Exceeds $31M in 2019

Network-on-Chip (NoC) semiconductor IP growth driven by customer development of new automotive, machine learning & data center systems-on-chip (SoCs)

CAMPBELL, Calif. — January 28, 2020 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that the company added 17 new licensees in 2019 for its Arteris® IP Ncore®, FlexNoC®, CodaCache®, AI Package, Resilience Package, and PIANO® Interconnect IP products. Of the 15 Arteris IP licensees publicly announced during 2019, three were acquired during the year (Bitmain, DisplayLink, and Vayyar) and fourteen are as yet undisclosed. The total number of Arteris IP customers reached 130.

“With our sizeable customer acquisition of 17 new licensees in 2019 and 20 new licensees in 2018, Arteris IP has increased interconnect market share against all alternatives. This growth allows Arteris IP to commercially invest more than anyone else in interconnect IP engineering and support to deliver best-in-class NoC technology to our customers. Arteris IP is increasingly the world’s trusted NoC interconnect engineering think tank able to augment an SoC ecosystem of related IP and EDA companies.”


K. Charles Janac, President and CEOArteris IP

Topics: new customer Ncore FlexNoC ncore cache coherent interconnect flexnoc ai package

Arteris IP Presents: Lessons Learned integrating AI/ML Accelerators into Complex ISO 26262 Compliant Systems-on-Chip

This presentation titled, "Lessons Learned integrating AI/ML Accelerators into Complex ISO 26262 Compliant Systems-on-Chip," presented by Kurt Shuler, VP of Marketing and Functional Safety Manager (FSM) at Arteris IP, and Diego Botero, Functional Safety Engineer at Arteris IP, to an audience at the ISO 26262 for Semiconductors (Munich) Conference.

Topics: functional safety ISO 26262 Systems-on-Chip FlexNoC kurt shuler accelerators ML/AI automotive chips IQPC

Arteris® IP FlexNoC® Interconnect and AI Package Licensed by Vastai Technologies for Artificial Intelligence Chips

State-of-the-art Network-on-Chip (NoC) interconnect enables faster performance and shorter development time

CAMPBELL, Calif. — January 21, 2020 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Vastai Technologies has licensed Arteris FlexNoC Interconnect IP and the accompanying AI Package for use in its next-generation artificial intelligence and computer vision systems-on-chip (SoCs).

We chose Arteris IP because of their excellent reputation and the maturity of their NoC IP. Using Arteris IP reduced our product costs and shortened our development schedule while allowing us to achieve better performance than we thought was possible. In addition, the Arteris IP team has exceeded our expectations for local technical support and engineering expertise.”


John Qian, CEO, Vastai Technologies

Topics: SoC NoC new customer performance AI chips ML/AI scalable hardware on-chip bandwidth

Arteris IP Ncore® Cache Coherent Interconnect Licensed by Bitmain for Sophon TPU Artificial Intelligence (AI) Chips

Network-on-chip (NoC) interconnect enables faster performance and lower die area for Tensor Processing Unit (TPU) AI/ML applications

CAMPBELL, Calif. June 9, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Bitmain has licensed Arteris Ncore Cache Coherent Interconnect IP for use in its next-generation Sophon Tensor Processing Unit (TPU) systems-on-chip (SoCs) for the scalable hardware acceleration of artificial intelligence (AI) and machine learning (ML) algorithms.

Our choice of interconnect IP became more important as we continued to increase the complexity and performance of Sophon AI SoCs. The Arteris Ncore cache coherent interconnect IP allowed us to increase our on-chip bandwidth and reduce die area, while being easy to implement in the backend. The Ncore IP’s configurability helped us optimize the die area of our SoC, which permits us to offer our users more performance at lower cost.”


Haichao Wang, CEO, Bitmain

Topics: SoC NoC new customer performance AI chips ML/AI scalable hardware on-chip bandwidth

Arteris IP FlexNoC® Interconnect Implemented in Uhnder Digital Automotive Radar-on-Chip

Austin-based startup uses Arteris IP interconnect to optimize on-chip communications for automotive radar-on-chip (RoC) systems

CAMPBELL, Calif. June 25, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Uhnder’s new automotive radar-on-chip (RoC) uses the Arteris FlexNoC IP as the on-chip interconnect.

Our choice of on-chip interconnect IP was very important to our success because of the unprecedented extent of on-chip integration and our huge bandwidth requirements. The Arteris FlexNoC interconnect IP helped us to surpass our performance goals while avoiding routing congestion in our tightly integrated single-chip radar.”


Manju Hedge, CEO and Cofounder, Uhnder

Topics: SoC NoC new customer machine learning autonomous driving flexnoc interconnect ML/AI on-chip communications automotive radar