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Arteris IP and Wave Computing Collaborate on Reference Architecture for Enterprise Dataflow Platform

The Arteris FlexNoC Artificial Intelligence (AI) Package Coupled with Wave Computing's AI Systems and IP Technology Create a Unified Platform Optimized for AI Data Processing 

CAMPBELL, Calif. May 21, 2019Arteris IP, the world’s leading supplier of innovative silicon-proven network-on-chip(NoC) interconnect intellectual property (IP), and Wave Computing®, the Silicon Valley company accelerating artificial intelligence (AI) from the datacenter to the edge, are collaborating to create a blueprint that can help customers overcome compute-to-memory design challenges. Additionally, Wave Computing is licensing Arteris IP’s Ncore Cache Coherent Interconnect, FlexNoC interconnect IP, and its accompanying FlexNoC AI Package for use in the AI-enabled chips that fuel Wave Computing’s data center systems products. By working together to assimilate each other’s technology attributes, Wave Computing and Arteris can ensure the seamless flow of information enterprise-wide, helping speed time-to-insight.

Wave and Arteris have complementary compute and networking technologies that, when packaged together, address some of the key challenges facing system-on-chip designers today such as shorter product cycles and rapidly increasing product complexity. The world of AI demands greater compute power. Working with Arteris allows us to design a scalable data platform with blazing-fast performance at a cost-effective price that helps customers accelerate insight from the edge to the data center.”


Steve Brightfield, Senior Director, Strategic AI IP Marketing, Wave Computing

Topics: Arteris FlexNoC new customer artificial intelligence ncore cache coherent interconnect flexnoc ai package noc interconnect SoC designs datacenters

Arteris® IP FlexNoC® Interconnect and Resilience Package Licensed by Black Sesame for ISO 26262-Compliant AI Chips for ADAS

Mature network-on-chip interconnect technology enables smoother ASIL certification and time to market for AI-powered autonomous driving systems

CAMPBELL, Calif. May 14, 2019– Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Black Sesame Technologies has licensed Arteris FlexNoC interconnect IP and the accompanying FlexNoC Resilience Package for use in its next-generation automotive advanced driver assistance systems (ADAS) that utilize advanced artificial intelligence (AI) algorithms for autonomous driving capabilities.

Our new generation of autonomous driving systems require data protection within the on-chip NoC interconnect to meet ISO 26262 ASIL B functional safety requirements as well as extensive quality of service guarantees to meet the demanding needs of our AI hardware acceleration architecture. Arteris IP is the world leader in NoC interconnect technology and a pioneer in automotive and AI markets, and Arteris FlexNoC IP and the Resilience Package are helping us to more quickly develop our ISO 26262-compliant systems.”


David Zeng, VP of Engineering, Black Sesame

Topics: automotive semiconductors Arteris FlexNoC new customer flexnoc resilience package ADAS ISO 26262 compliance artificial intelligence

Semiconductor Engineering: Chiplet Momentum Builds, Despite Tradeoffs

 Arteris IP's Kurt Shuler, Vice President of Marketing, contributes to this latest article in Semiconductor Engineering.

Topics: SoC semiconductor engineering kurt shuler noc interconnect IP design

Arteris IP FlexNoC® & Resilience Package Licensed by Semidrive for ISO 26262-Compliant Autonomous Driving Chips

Network-on-Chip technology enables functional safety and performance for highly complex automotive systems-on-chip (SoCs)

CAMPBELL, Calif. May 7, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Semidrive has licensed the Arteris IP FlexNoC Interconnect and the accompanying FlexNoC Resilience Package for use in chips that are the brains in automotive autonomous driving and advanced driver assistance systems (ADAS).

Arteris IP offers us technology and expertise in both network-on-chip interconnects and functional safety. The combination of FlexNoC and the Resilience Package enables us to develop chips that not only meet our demanding requirements for performance, power consumption and die area, but also incorporate on-chip functional safety mechanisms that help us achieve ISO 26262 certification for automotive functional safety.”


Maggie Qiu, CEO, Semidrive

Topics: NoC automotive semiconductors Arteris FlexNoC new customer ADAS autonomous driving

Semiconductor Engineering: Interconnect Prominence In Fail-Operational Architectures

 Arteris IP's Kurt Shuler, Vice President of Marketing, authored this latest article in Semiconductor Engineering about moving toward "Fail Operational"

Topics: SoC automotive ADAS semiconductor engineering kurt shuler ISO PAS 21448 noc interconnect

Semiconductor Engineering: Make Your Own Energy

 Arteris IP's Kurt Shuler, Vice President of Marketing, quoted in the latest Semiconductor Engineering article.

Make Your Own Energy

May 2nd, 2019 - By Ann Steffora Mutschler

Efficient use of power and energy in electric vehicles and smart buildings will require innovative thinking. 

Where it works
Energy harvesting has been important to automotive systems, but not necessarily at the SoC level, said Kurt Shuler, vice president of marketing at Arteris IP. “In EV and hybrid automotive systems, regenerative braking is common and there’s efforts to harvest vibrational energy using piezoelectric transducer MEMS, but this technology will take a while to become mainstream.”

At the SoC level, the first place Arteris IP saw energy harvesting implemented was in 2014 with TI’s SimpleLink CC26xx energy-sipping IoT chips, which are designed to be powered by a separate MEMS-based power source. Even though these chips are relatively simple SoCs from a processing viewpoint, Shuler stressed that they are hugely complex from a power management standpoint. There are more than 20 different power and voltage domains along with dynamic voltage frequency scaling.

For more information, please download the Arteris FlexNoC Interconnect IP data sheet; https://www.arteris.com/download-flexnoc-datasheet

Topics: SoC automotive semiconductor engineering noc interconnect automotive systems EV hybrid

Multiple Arteris® IP FlexNoC® Interconnect Licenses Purchased by VeriSilicon for Multiple Chip Designs

Silicon Platform as a Service (SiPaas®) pioneer standardizes on Arteris interconnect IP

CAMPBELL, Calif. April 30, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect semiconductor intellectual property, today announced that VeriSilicon has licensed Arteris FlexNoC interconnect IP as the on-chip communications backbone for use in multiple chips developed by the VeriSilicon team.

We have chosen to standardize on Arteris FlexNoC for our chip designs’ interconnect IP because we have found that it reduces our development time while allowing us to more easily implement more complex SoCs than was possible with older interconnect technologies. Using Arteris IP allows us to add value to our designs which increases the benefits we deliver to our customers, differentiates us from our competitors, and increases margins for both us and our customers. Arteris IP delivers win-win results.”


Dr. Wayne Dai, Chairman, President and Chief Executive OfficerVeriSilicon

Topics: automotive semiconductors Arteris FlexNoC new customer neural networks on-chip communications

Arteris IP FlexNoC® Interconnect Licensed by Samsung's System LSI Business for Digital TV Chips

NoC interconnect enables high bandwidth and low latency on-chip communications while increasing functional safety diagnostic coverage

CAMPBELL, Calif. April 23, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect semiconductor intellectual property, today announced that Samsung’s System LSI Business has renewed multiple Arteris IP FlexNoC Interconnect licenses for use in multiple high-performance digital TV (DTV) processing chips utilizing Samsung’s latest semiconductor technology process nodes.

Over many years, FlexNoC interconnect IP has helped us accelerate implementation of our digital TV chip designs on our latest semiconductor process nodes. This core interconnect technology is required to develop complex and highly optimized chips in a predictable, low-risk fashion.”


Jaeyoul Lee, Vice President, Samsung Electronics

Topics: Arteris FlexNoC new customer processor nodes high-performance Exynos mobile processors SoC chips

SemiWiki: ML and Memories: A Complex Relationship

Kurt Shuler, VP Marketing at Arteris IP, helped Bernard Murphy (SemiWiki) learn the multiple ways that different types of memory need to connect to these accelerators in the latest SemiWiki blog:

ML and Memories: A Complex Relationship

March 13th, 2019 - By Bernard Murphy

How do AI architectures connect with memories? The answer is more complex than in conventional SoC architectures.

No, I’m not going to talk about in in-memory-compute architectures. There’s interesting work being done there but here I’m going to talk here about mainstream architectures for memory support in Machine Learning (ML) designs. These are still based on conventional memory components/IP such as cache, register files, SRAM and various flavors of off-chip memory, including not yet “conventional” high-bandwidth memory (HBM). However, the way these memories are organized, connected and located can vary quite significantly between ML applications.

For more information, please visit the Arteris IP AI package webpage: http://www.arteris.com/flexnoc-ai-package

Topics: semiconductor artificial intelligence semiwiki kurt shuler flexnoc ai package noc interconnect cache coherence

Semiconductor Engineering: The Long and Detailed Road to Automotive Compliance

 Arteris IP's Kurt Shuler, Vice President of Marketing, comments in the latest Semiconductor Engineering article.

The Long and Detailed Road to Automotive Compliance

April 4th, 2019 - By Ann Steffora Mutschler

Bringing an engineering organization up to speed with automotive safety standards is a long and arduous process. 

Complexity on complexity
Things can get complicated very fast. Kurt Shuler, vice president of marketing at Arteris IP, said it is not uncommon in SOTIF applications to hear, “‘I’m going to do a system and it’s got cameras, and it’s got radars, and the radars have cameras, and there are sensors.’ It’s very complicated. People ask us how to protect against this and that, and how to ensure this thing works and what can be done in the interconnect to help with that. So we get pulled into these really high-level questions. And because an interconnect is configurable IP, and each customer’s design is totally different, we also get pulled into discussions around the process aspect to ISO 26262 when using configurable IP as opposed to a hard macro. These companies are asking us 1,001 questions about that, and it really is difficult. What we generally have to do is agree upfront that we are responsible for a specific part of the specification. And as a safety element out of context, we are responsible for this type of analysis and this kind of stuff; here are our assumptions of use and everything; and we agree on this. Any other insights we give to them is something we do to help them, but it’s not necessarily part of a contract or that’s required. The reason to have that agreement up front is because a lot of these companies are new to automotive, and we have a lot of experience, but we don’t want to be an ISO 26262 consultancy.”

For more information, please click and download this presentation; ISO 26262: What to expect from your chip or IP provider: https://www.arteris.com/download-iso-26262-what-to-expect-from-your-chip-or-ip-provider

Topics: SoC ISO 26262 automotive semiconductor engineering noc interconnect SOTIF (ISO 21448