NoC Solution

NoC Solution is the Arteris Network-On-Chip product that addresses the needs of complex designs that require very high performance and a broad range of advanced interconnect features, such as QoS, multiple clock and power domain support, error handling, firewalls and extensive debug features. The product contains an advanced DRAM scheduler which is seamlessly integrated within the NoC architecture.

The NoC is supported by a set of configuration and modeling tools:

• NoCcompiler
• NoCverifier
• NoCexplorer

Using NoCexplorer, SoC architects can capture their system in the form of initiators and targets, and their traffic. They can then rapidly evaluate how variations to NoC topology affect overall system performance. NoCexplorer incorporates a unique throughput-accurate simulation engine that provides nearly instant reporting on congestion at shared resources, and the resulting system-level latency within the simulated NoC topology. This makes it possible to conduct fast-paced evaluations of alternative topologies until an optimal result is obtained.

NoCcompiler is the NoC configuration environment. With NoCcompiler, SoC designers can quickly configure, instantiate, and connect with drag-and-drop ease various IP elements to construct a NoC optimally suited for the application.

NoCverifier is an integrated VMM-based verification tool which automatically generates a test environment for a particular NoC instantiation. NoC Solution is used in some of the industry’s most advanced application processors and video processing chip and the technology has proven to result in significantly lower power and higher performance SoC interconnects than competitive approaches can achieve.