Arteris Press Releases

Kurt Shuler

Kurt Shuler

Recent Posts by Kurt Shuler:

Arteris IP Ncore® Cache Coherent Interconnect Licensed by Bitmain for Sophon TPU Artificial Intelligence (AI) Chips

Network-on-chip (NoC) interconnect enables faster performance and lower die area for Tensor Processing Unit (TPU) AI/ML applications

CAMPBELL, Calif. June 9, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Bitmain has licensed Arteris Ncore Cache Coherent Interconnect IP for use in its next-generation Sophon Tensor Processing Unit (TPU) systems-on-chip (SoCs) for the scalable hardware acceleration of artificial intelligence (AI) and machine learning (ML) algorithms.

Our choice of interconnect IP became more important as we continued to increase the complexity and performance of Sophon AI SoCs. The Arteris Ncore cache coherent interconnect IP allowed us to increase our on-chip bandwidth and reduce die area, while being easy to implement in the backend. The Ncore IP’s configurability helped us optimize the die area of our SoC, which permits us to offer our users more performance at lower cost.”


Haichao Wang, CEO, Bitmain

Topics: SoC NoC new customer performance AI chips ML/AI scalable hardware on-chip bandwidth

Arteris IP FlexNoC® Interconnect Implemented in Uhnder Digital Automotive Radar-on-Chip

Austin-based startup uses Arteris IP interconnect to optimize on-chip communications for automotive radar-on-chip (RoC) systems

CAMPBELL, Calif. June 25, 2019– Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Uhnder’s new automotive radar-on-chip (RoC) uses the Arteris FlexNoC IP as the on-chip interconnect.

Our choice of on-chip interconnect IP was very important to our success because of the unprecedented extent of on-chip integration and our huge bandwidth requirements. The Arteris FlexNoC interconnect IP helped us to surpass our performance goals while avoiding routing congestion in our tightly integrated single-chip radar.”


Manju Hedge, CEO and Cofounder, Uhnder

Topics: SoC NoC new customer machine learning autonomous driving flexnoc interconnect ML/AI on-chip communications automotive radar

Arteris® IP FlexNoC® Interconnect Licensed by Achronix for New Speedster®7t FPGA family

Network-on-chip (NoC) interconnect enables ASIC-like performance for Speedster7t FPGA family

CAMPBELL, Calif. — June. 18, 2019 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect intellectual property, today announced that Achronix Semiconductor Corporation has licensed Arteris FlexNoC interconnect IP for use in its new Speedster7t FPGA family – based on a new, highly optimized architecture – that goes beyond traditional FPGA solutions featuring ASIC-like performance, FPGA adaptability and enhanced functionality to streamline designs.

Our new Speedster7t FPGA family requires extremely high on-chip bandwidth and advanced dataflow arbitration to make possible ASIC-class machine learning processing. The Arteris FlexNoC IP is the optimal interconnect to meet these demands, especially with the advanced process technology nodes and multi-gigahertz frequencies we are dealing with."


Steve Mensor, Vice President of Marketing, Achronix

Topics: SoC FPGA new customer machine learning artificial intelligence flexnoc interconnect ML/AI Achronix

Silicon-Proven Arteris IP Ncore ® Cache Coherent Interconnect Implemented in Toshiba ISO 26262-Compliant ADAS Chip

Toshiba tapes out next-generation automotive ADAS system-on-chip (SoC) using mature network-on-chip interconnect technology

CAMPBELL, Calif. — June. 11, 2019 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect semiconductor intellectual property, today announced that Toshiba has taped out its next generation automotive advanced driver assistance system (ADAS) chip using the Arteris IP Ncore Cache Coherent and FlexNoC®non-coherent interconnect with the associated Resilience Package.

Our use of the uniquely flexible Ncore cache coherent interconnect IP helped us to more quickly design and implement our next generation automotive ADAS chips while allowing us to increase hardware diagnostic coverage for ISO 26262 compliance. The Arteris IP team was very helpful in guiding us on the interconnect configuration to optimize system performance and hardware diagnostic coverage using the integrated functional safety mechanisms. Working with the highly professional Arteris team and their world class interconnect IP has helped us meet our performance requirements and schedule, while adding valuable capabilities that would not be possible with other interconnects.


Nobuaki Otsuka, Technology Executive at Electronic Device & Storage Corporation, Toshiba

Topics: SoC ISO 26262 automotive semiconductors japan flexnoc resilience package ADAS cache coherent interconnect advanced driver assistance systems adas imaging processor ncore cache coherent interconnect