Arteris Press Releases

Kurt Shuler

Kurt Shuler

Recent Posts by Kurt Shuler:

ArterisIP and ResilTech Announce Strategic Partnership to Facilitate ISO 26262 Compliance for Complex Autonomous Automotive Systems

Joint engineering and integration effort simplifies and accelerates ISO 26262 FMEDA and diagnostic coverage for ASIL D qualification

CAMPBELL, Calif. and PONTEDERA, Italy — June 20, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, and ResilTech S.R.L., the leader in resilient computing and functional safety for automotive systems, today announced a strategic partnership to help semiconductor design teams efficiently validate ISO26262 functional safety levels for automotive systems-on-chip.

Working with ArterisIP allows ResilTech to apply its automotive resilience expertise to a broad range of automotive SoC projects. Our goal is to not only provide interconnect-specific functional safety knowledge to ArterisIP automotive customers, but to also ultimately facilitate a resilience verification solution for highly complex SoCs.


Andrea Bondavalli, Senior Board Member and Co-Founder, ResilTech

Topics: functional safety cache coherency ncore resilience package ResilTech ISO 26262 compliance

Cambricon Licenses Arteris FlexNoC Interconnect IP for Machine Learning SoCs

Highly scalable fabric IP is key to accelerating machine learning

CAMPBELL, Calif. — April 18, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that Cambricon has licensed Arteris FlexNoC interconnect IP for use as the backbone interconnect of their revolutionary machine learning SoC.

After a rigorous evaluation of nearly all commercial solutions, we determined that Arteris FlexNoC interconnect IP was the only NoC technology that would meet all our requirements.


Dr. Daofu Liu, Vice President, Cambricon

Topics: new customer machine learning ArterisIP neural networks FlexNoC

ArterisIP Advances Machine Learning SoC Design with Ncore 2.0 Cache Coherent Interconnect and Resilience Package

SoC interconnect IP enables highly scalable neural network systems with integrated hardware functional safety features for ISO 26262 ASIL D compliance

Linley Autonomous Hardware Conference 2017, SANTA CLARA, Calif. — April 6, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the Ncore 2.0 Cache Coherent Interconnect IP and the optional Ncore Resilience Package to accelerate and enhance the creation of next-generation designs for autonomous driving systems and advanced driver assistance systems (ADAS).

We are very impressed with the new ArterisIP Ncore interconnect IP technologyArterisIP Ncore 2.0 interconnect IP offers even higher scalability along with the Coherent Memory Cache, which reduces DRAM accesses while maintaining area efficiency.


Mr. Yu Li, Vice President, Sanechips (Subsidiary of ZTE)

Topics: ISO 26262 new product machine learning Ncore automotive functional safety ArterisIP ncore resilience package neural networks

Arteris is now ArterisIP

CAMPBELL, Calif. — March 30, 2017 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it will now be known as ArterisIP.

The ArterisIP name change reflects our goal of delivering semiconductor intellectual property that enables advanced on-chip communications and die-to-die communications for all SoC markets - worldwide.


K. Charles Janac, President and CEO, ArterisIP

Topics: arteris growth ArterisIP
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