Arteris Press Releases

Arteris Ncore Cache Coherent Interconnect IP is Implemented by NXP

Cache coherent IP combined with resilience features enables functional safety for heterogeneous cache coherent systems-on-chip (SoC)

CAMPBELL, California — May 24, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that NXP Semiconductors has licensed Ncore™ cache coherent interconnect IP for use in its SoCs.

We chose Ncore interconnect IP because of its outstanding configurability and flexibility, allowing us to create highly differentiated cache coherent SoCs using processors and accelerator IP optimized for the application. Having precise control over the configuration of coherent agent ports, memory interfaces, and snoop filters helps us make more power- and area-efficient SoCs. The distributed hardware architecture allows for a more efficient physical design by easing back-end placement and timing closure.

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Benny Chang, Vice President of R&D, Automotive MCU and Processors Business LineNXP Semiconductors

  Download Ncore presentation

The design teams at NXP have been long-time users of Arteris IP, having first licensed Arteris FlexNoC interconnect IP in 2011 and successfully implemented FlexNoC interconnects in its QorIQ network processing platform. The first implementation of Ncore interconnect IP in NXP is in heterogeneous cache coherent SoCs for next generation automotive MCU’s and processors.

“We chose Ncore interconnect IP because of its outstanding configurability and flexibility, allowing us to create highly differentiated cache coherent SoCs using processors and accelerator IP optimized for the application,” said Benny Chang, Vice President of R&D for NXP’s Automotive MCU and Processors Business Line. “Having precise control over the configuration of coherent agent ports, memory interfaces, and snoop filters helps us make more power- and area-efficient SoCs. The distributed hardware architecture allows for a more efficient physical design by easing back-end placement and timing closure.”

“NXP’s innovative use of Ncore IP for its next generation automotive MCU’s and processors is an example of how heterogeneous cache coherent SoC design will change due to state-of-the-art on-chip interconnect technologies,” said K. Charles Janac, President and CEO of Arteris. “Arteris is happy that our Ncore cache coherent IP is allowing unprecedented efficiency and differentiation for future automotive technologies.”

About Arteris

Arteris, Inc. provides system-on-chip (SoC) interconnect IP and tools to accelerate SoC semiconductor assembly for a wide range of applications. Rapid semiconductor designer adoption by customers such as Samsung, Huawei / Hisilicon, Mobileye, Altera, and Texas Instruments has resulted in Arteris being the only semiconductor IP company to be ranked in the Inc. 500 and Deloitte Technology Fast 500 lists in 2012 and 2013. Customer results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. More information can be found at www.arteris.com.

Editorial Contact

Kurt Shuler
Arteris Inc.
+1 408 470 7300
kurt.shuler@arteris.com

Arteris, FlexNoC and the Arteris logo are trademarks of Arteris. All other product or service names are the property of their respective owners.

Topics: new customer new product automotive cache coherent IP Ncore heterogeneous cache coherency cache coherency cache coherent interconnect NXP Semiconductors