Arteris Press Releases

Arteris Ncore Cache Coherent Interconnect IP enabled by ARM’s Cycle Models

Cycle-accurate SystemC models power highly scalable verification and performance optimization infrastructure

CAMPBELL, California — May 24, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has used ARM® Cycle Models for use in hardware and performance verification Ncore™ Cache Coherent Interconnect IP.

ARM Cycle Models provide early, secure access to ARM’s leading edge IP. Enabling Arteris to integrate this technology into their development infrastructure highlights ARM’s commitment to enabling design optimization, time-to-market and cost-efficiency gains for our ecosystem partners.

Javier Orensanz, General Manager, Development Solutions GroupARM

Topics: ARM new product AMBA ACE protocol cache coherent IP ARM cycle models Ncore cycle accurate simulation heterogeneous cache coherency cache coherency cache coherent interconnect system level modeling

Arteris Extends Support for ARM AMBA Protocols

Accelerates AMBA ACE, AXI and CHI protocol adoption for heterogeneous multi-core system-on-chip IP integration

ARM TechCon 2015, SANTA CLARA, Calif. — Arteris Inc., supplier of silicon-proven commercial network-on-chip (NoC) interconnect IP solutions, today announced that it is expanding its support and integration of ARM® AMBA® protocol specifications.

Topics: ARM AMBA AMBA ACE protocol

ARM and Arteris Extend Partnership to Deliver Additional Interconnect Options to SoC Designers

Arteris access to ARM® Cortex®-A15 and ARM Cortex-A7 microprocessor cores to enhance the success and diversity of ARM technology in mobility and consumer SoCs

SUNNYVALE, California — April 17, 2013 — Arteris and ARM (LON: ARM; Nasdaq: ARMH) have signed a multi-year agreement that expands Arteris’ access to ARM processor core IP. The two companies have broadened their cooperation to aid the development of future Arteris coherent interconnect IP products that more closely integrate with Arteris’ pioneering FlexNoC® network-on-chip technology and ARM’s processor IP.

We are enabling additional interconnect options to support the rapid adoption of ARM technology. These new options will help ARM and Arteris customers build new interconnect architectures. This is another step forward for the ARM community and for Arteris, which was a participant in the ARM AMBA® 4 ACE™ specification process.

Noel Hurley, Vice President of Marketing and Strategy, Processor Division, ARM

Topics: ARM AMBA ACE protocol cache coherent IP arteris partner