Arteris Press Releases

Antonio J. Viana Joins Arteris Board of Directors

Arteris adds former ARM executive and commercial IP industry veteran to its board

CAMPBELL, Calif. — Nov. 8, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that Antonio J. Viana has joined the Arteris Board of Directors.

With every generation of silicon, the on-chip interconnect IP becomes more critical and more important. Arteris has consistently demonstrated the capability to address the needs of the most inventive and demanding design teams. I am excited to join the board and contribute to their growth.


Antonio J. Viana, Member, Board of Directors, Arteris

Topics: ARM arteris growth antonio j viana

Arteris Adds Support for ARM AMBA 5 AHB5 Protocol

ARM TechCon 2016, SANTA CLARA, Calif. — Oct. 25, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has implemented ARM® AMBA® 5 Advanced High-Performance Bus 5 (AHB5) protocol support in its FlexNoC Interconnect IP and Ncore Interconnect IP products.

Arteris’ support of AHB5 is another demonstration of how ARM’s ecosystem helps to simplify and foster the development of secure Internet of Things devices.


Nandan Nayampally, Vice President, Marketing and Strategy, CPU Group, ARM

Topics: ARM AMBA AHB transaction protocols Arteris FlexNoC

Arteris Ncore Cache Coherent Interconnect IP enabled by ARM’s Cycle Models

Cycle-accurate SystemC models power highly scalable verification and performance optimization infrastructure

CAMPBELL, California — May 24, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has used ARM® Cycle Models for use in hardware and performance verification Ncore™ Cache Coherent Interconnect IP.

ARM Cycle Models provide early, secure access to ARM’s leading edge IP. Enabling Arteris to integrate this technology into their development infrastructure highlights ARM’s commitment to enabling design optimization, time-to-market and cost-efficiency gains for our ecosystem partners.


Javier Orensanz, General Manager, Development Solutions GroupARM

Topics: ARM new product AMBA ACE protocol cache coherent IP ARM cycle models Ncore cycle accurate simulation heterogeneous cache coherency cache coherency cache coherent interconnect system level modeling

Arteris Extends Support for ARM AMBA Protocols

Accelerates AMBA ACE, AXI and CHI protocol adoption for heterogeneous multi-core system-on-chip IP integration

ARM TechCon 2015, SANTA CLARA, Calif. — Arteris Inc., supplier of silicon-proven commercial network-on-chip (NoC) interconnect IP solutions, today announced that it is expanding its support and integration of ARM® AMBA® protocol specifications.

Topics: ARM AMBA AMBA ACE protocol