Arteris Press Releases

Silicon-Proven Arteris IP Ncore ® Cache Coherent Interconnect Implemented in Toshiba ISO 26262-Compliant ADAS Chip

Toshiba tapes out next-generation automotive ADAS system-on-chip (SoC) using mature network-on-chip interconnect technology

CAMPBELL, Calif. — June. 11, 2019 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect semiconductor intellectual property, today announced that Toshiba has taped out its next generation automotive advanced driver assistance system (ADAS) chip using the Arteris IP Ncore Cache Coherent and FlexNoC®non-coherent interconnect with the associated Resilience Package.

Our use of the uniquely flexible Ncore cache coherent interconnect IP helped us to more quickly design and implement our next generation automotive ADAS chips while allowing us to increase hardware diagnostic coverage for ISO 26262 compliance. The Arteris IP team was very helpful in guiding us on the interconnect configuration to optimize system performance and hardware diagnostic coverage using the integrated functional safety mechanisms. Working with the highly professional Arteris team and their world class interconnect IP has helped us meet our performance requirements and schedule, while adding valuable capabilities that would not be possible with other interconnects.


Nobuaki Otsuka, Technology Executive at Electronic Device & Storage Corporation, Toshiba

Topics: SoC ISO 26262 automotive semiconductors japan flexnoc resilience package ADAS cache coherent interconnect advanced driver assistance systems adas imaging processor ncore cache coherent interconnect

ArterisIP announces Ncore 3 Cache Coherent Interconnect

Enables next-generation machine learning and autonomous driving SoCs with support for Arm AMBA CHI protocol, CCIX, and ISO 26262 Functional Safety

Linley Processor Conference 2017, SANTA CLARA, Calif. — October 4, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the Ncore Cache Coherent Interconnect IP version 3 along with the optional Ncore Resilience Package for functional safety.

As current users of the Ncore cache coherent interconnect, we are excited about the technical innovation in ArterisIP’s new Ncore 3 IP. Enabling both the AMBA CHI and ACE protocols in the same SoC will allow for greater use of existing IP in high-performance systems.


Mr. Yu Li, Vice President , ZTE (SaneChips)

Topics: new product AMBA ACE protocol Ncore cache coherent interconnect CCIX ncore resilience package ISO 26262 certification AMBA5 CHI

ArterisIP Ncore Cache Coherent Interconnect and Resilience Package Licensed by NXP

CAMPBELL, Calif. — September 19, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that NXP Semiconductors has licensed additional uses of Ncore Cache Coherent Interconnect IP and Ncore Resilience Packages.

We had an excellent experience implementing ArterisIP’s Ncore Cache Coherent Interconnect IP in our previous SoC developments so we have chosen to expand the adoption of this technology for our next generation SoCs.


Benny Chang, Vice President of R&D, Automotive MCU and Processors Business LineNXP Semiconductors

Topics: new customer automotive Ncore heterogeneous cache coherency cache coherent interconnect NXP Semiconductors automotive functional safety ncore resilience package ISO 26262 ASIL D autonomous driving

Arteris Ncore Cache Coherent Interconnect IP Licensed by Toshiba Corporation (Toshiba) for Automotive ADAS

Heterogeneous cache coherency and simpler ISO 26262 automotive functional safety qualification enabled by configurable interconnect IP

CAMPBELL, Calif. — Nov. 1, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that Toshiba has licensed Arteris Ncore Cache Coherent Interconnect IP for use in its image recognition processors for ADAS applications.

In evaluating cache coherent interconnects, we found that Arteris Ncore was the interconnect that provided us with the flexibility to fully optimize our system while also providing the data protection features we require to meet the highest possible ISO 26262 requirements. Arteris Ncore IP is a key component of our image recognition processor architecture.


Nobuaki Otsuka, Senior Manager, Mixed Signal IC Design Department, Toshiba

Topics: ISO 26262 automotive semiconductors new customer new product japan flexnoc resilience package ADAS Ncore cache coherent interconnect advanced driver assistance systems adas imaging processor