Arteris Press Releases

ArterisIP announces Ncore 3 Cache Coherent Interconnect

Enables next-generation machine learning and autonomous driving SoCs with support for Arm AMBA CHI protocol, CCIX, and ISO 26262 Functional Safety

Linley Processor Conference 2017, SANTA CLARA, Calif. — October 4, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the Ncore Cache Coherent Interconnect IP version 3 along with the optional Ncore Resilience Package for functional safety.

As current users of the Ncore cache coherent interconnect, we are excited about the technical innovation in ArterisIP’s new Ncore 3 IP. Enabling both the AMBA CHI and ACE protocols in the same SoC will allow for greater use of existing IP in high-performance systems.


Mr. Yu Li, Vice President , ZTE (SaneChips)

Topics: new product Ncore cache coherent interconnect CCIX AMBA5 CHI AMBA ACE protocol ncore resilience package ISO 26262 certification

ArterisIP Ncore Cache Coherent Interconnect and Resilience Package Licensed by NXP

CAMPBELL, Calif. — September 19, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that NXP Semiconductors has licensed additional uses of Ncore Cache Coherent Interconnect IP and Ncore Resilience Packages.

We had an excellent experience implementing ArterisIP’s Ncore Cache Coherent Interconnect IP in our previous SoC developments so we have chosen to expand the adoption of this technology for our next generation SoCs.


Benny Chang, Vice President of R&D, Automotive MCU and Processors Business LineNXP Semiconductors

Topics: new customer automotive Ncore heterogeneous cache coherency cache coherent interconnect NXP Semiconductors automotive functional safety ISO 26262 ASIL D ncore resilience package autonomous driving

Arteris Ncore Cache Coherent Interconnect IP Licensed by Toshiba Corporation (Toshiba) for Automotive ADAS

Heterogeneous cache coherency and simpler ISO 26262 automotive functional safety qualification enabled by configurable interconnect IP

CAMPBELL, Calif. — Nov. 1, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that Toshiba has licensed Arteris Ncore Cache Coherent Interconnect IP for use in its image recognition processors for ADAS applications.

In evaluating cache coherent interconnects, we found that Arteris Ncore was the interconnect that provided us with the flexibility to fully optimize our system while also providing the data protection features we require to meet the highest possible ISO 26262 requirements. Arteris Ncore IP is a key component of our image recognition processor architecture.


Nobuaki Otsuka, Senior Manager, Mixed Signal IC Design Department, Toshiba

Topics: new customer automotive semiconductors japan flexnoc resilience package advanced driver assistance systems adas ADAS Ncore cache coherent interconnect new product ISO 26262 imaging processor

Arteris Ncore Cache Coherent Interconnect IP enabled by ARM’s Cycle Models

Cycle-accurate SystemC models power highly scalable verification and performance optimization infrastructure

CAMPBELL, California — May 24, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has used ARM® Cycle Models for use in hardware and performance verification Ncore™ Cache Coherent Interconnect IP.

ARM Cycle Models provide early, secure access to ARM’s leading edge IP. Enabling Arteris to integrate this technology into their development infrastructure highlights ARM’s commitment to enabling design optimization, time-to-market and cost-efficiency gains for our ecosystem partners.


Javier Orensanz, General Manager, Development Solutions GroupARM

Topics: ARM new product AMBA ACE protocol cache coherent IP ARM cycle models Ncore cycle accurate simulation heterogeneous cache coherency cache coherency cache coherent interconnect system level modeling