Arteris Press Releases

ArterisIP announces Ncore 3 Cache Coherent Interconnect

Enables next-generation machine learning and autonomous driving SoCs with support for Arm AMBA CHI protocol, CCIX, and ISO 26262 Functional Safety

Linley Processor Conference 2017, SANTA CLARA, Calif. — October 4, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the Ncore Cache Coherent Interconnect IP version 3 along with the optional Ncore Resilience Package for functional safety.

As current users of the Ncore cache coherent interconnect, we are excited about the technical innovation in ArterisIP’s new Ncore 3 IP. Enabling both the AMBA CHI and ACE protocols in the same SoC will allow for greater use of existing IP in high-performance systems.


Mr. Yu Li, Vice President , ZTE (SaneChips)

Topics: new product AMBA ACE protocol Ncore cache coherent interconnect CCIX ncore resilience package ISO 26262 certification AMBA5 CHI

Arteris Joins CCIX Consortium to Support Heterogeneous Cache Coherency Deployment

Interconnect IP pioneer offers technology extending cache coherence to on-chip and off-chip hardware accelerators and processors

CAMPBELL, Calif. — Oct. 11, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has joined the Cache Coherent Interconnect for Accelerators Consortium, also known as the CCIX Consortium.

Our expertise in supporting the leading industry cache coherent protocols allows Arteris to accelerate the development and deployment of highly scalable CCIX-based solutions in the data center. Our Ncore cache coherent interconnect IP is our first product to leverage this foundational technology, and CCIX-based systems will provide even more opportunities for this technology to proliferate.


Kurt Shuler, Vice President, Marketing, Arteris

Topics: arteris partner Ncore CCIX