Arteris Press Releases

Silicon-Proven Arteris IP Ncore ® Cache Coherent Interconnect Implemented in Toshiba ISO 26262-Compliant ADAS Chip

Toshiba tapes out next-generation automotive ADAS system-on-chip (SoC) using mature network-on-chip interconnect technology

CAMPBELL, Calif. — June. 11, 2019 — Arteris IP, the world’s leading supplier of innovative, silicon-proven network-on-chip (NoC) interconnect semiconductor intellectual property, today announced that Toshiba has taped out its next generation automotive advanced driver assistance system (ADAS) chip using the Arteris IP Ncore Cache Coherent and FlexNoC®non-coherent interconnect with the associated Resilience Package.

Our use of the uniquely flexible Ncore cache coherent interconnect IP helped us to more quickly design and implement our next generation automotive ADAS chips while allowing us to increase hardware diagnostic coverage for ISO 26262 compliance. The Arteris IP team was very helpful in guiding us on the interconnect configuration to optimize system performance and hardware diagnostic coverage using the integrated functional safety mechanisms. Working with the highly professional Arteris team and their world class interconnect IP has helped us meet our performance requirements and schedule, while adding valuable capabilities that would not be possible with other interconnects.


Nobuaki Otsuka, Technology Executive at Electronic Device & Storage Corporation, Toshiba

Topics: SoC ISO 26262 automotive semiconductors japan flexnoc resilience package ADAS cache coherent interconnect advanced driver assistance systems adas imaging processor ncore cache coherent interconnect

Arteris IP and Wave Computing Collaborate on Reference Architecture for Enterprise Dataflow Platform

The Arteris FlexNoC Artificial Intelligence (AI) Package Coupled with Wave Computing's AI Systems and IP Technology Create a Unified Platform Optimized for AI Data Processing 

CAMPBELL, Calif. — May 21, 2019  Arteris IP, the world’s leading supplier of innovative silicon-proven network-on-chip (NoC) interconnect intellectual property (IP), and Wave Computing®, the Silicon Valley company accelerating artificial intelligence (AI) from the datacenter to the edge, are collaborating to create a blueprint that can help customers overcome compute-to-memory design challenges. Additionally, Wave Computing is licensing Arteris IP’s Ncore Cache Coherent Interconnect, FlexNoC interconnect IP, and its accompanying FlexNoC AI Package for use in the AI-enabled chips that fuel Wave Computing’s data center systems products. By working together to assimilate each other’s technology attributes, Wave Computing and Arteris can ensure the seamless flow of information enterprise-wide, helping speed time-to-insight.

Wave and Arteris have complementary compute and networking technologies that, when packaged together, address some of the key challenges facing system-on-chip designers today such as shorter product cycles and rapidly increasing product complexity. The world of AI demands greater compute power. Working with Arteris allows us to design a scalable data platform with blazing-fast performance at a cost-effective price that helps customers accelerate insight from the edge to the data center.”


Steve Brightfield, Senior Director, Strategic AI IP Marketing, Wave Computing

Topics: Arteris FlexNoC new customer artificial intelligence ncore cache coherent interconnect flexnoc ai package noc interconnect SoC designs datacenters

Arteris IP Ncore® and FlexNoC® Interconnects and Resilience Packages Licensed by Mobileye for AI-Powered EyeQ Chips

Next generation ASIL B(D) autonomous driving systems to be enabled by ISO 26262-compliant cache coherent and non-coherent interconnect IP

CAMPBELL, Calif. — July 10, 2018 — Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip(NoC) interconnect intellectual property, today announced that Mobileye has purchased multiple licenses of Arteris IP Ncore Cache Coherent Interconnect, FlexNoC Interconnect, and the Ncore and FlexNoC Resilience Packages for functional safety and artificial intelligence (AI) hardware acceleration. This broad portfolio of Arteris IP interconnect technology will be the on-chip communications backbone of Mobileye’s next-generation ISO 26262 ASIL B(D) capable next generation EyeQ system-on-chip (SoC) devices.

We chose the Arteris Ncore cache coherent interconnect because of its unique proxy caches and their ability to underpin high-performance, low power, cache coherent clusters of our unique AI accelerators. And with our prior experience using FlexNoC and the FlexNoC Resilience Packages for functional safety, we trust Arteris IP to be the highest performing and safest choice for ISO 26262-compliant NoC IP.”


Elchanan Rushinek, Vice President of EngineeringMobileye

Topics: new customer flexnoc resilience package iso 26262 ASIL mobileye ncore resilience package flexnoc interconnect ncore cache coherent interconnect eyeq

Arteris IP and Synopsys Accelerate the Optimization of Heterogeneous Multicore Neural Network Systems-on-Chip

Ncore Cache Coherent Interconnect IP and Synopsys Platform Architect fast-tracks integration for autonomous driving and artificial intelligence (AI) markets

CAMPBELL, Calif. — January 30, 2018 — Arteris IP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the integration of its Ncore Cache Coherent IP with the Synopsys® Platform Architect™ virtual prototyping solution to provide designers of neural network and autonomous driving SoCs with the ability to analyze system-level performance and power consumption earlier in the design cycle for their next-generation multicore architectures.

Combining Platform Architect and Ncore System models provides designers with the ability to analyze and optimize an entire heterogeneous multicore SoC architecture before RTL is available.


Eshel Haritan, Vice President of R&D, Verification Group, Synopsys

Topics: Synopsys Ncore artificial intelligence neural network Platform Architect SystemC ncore cache coherent interconnect