Arteris Press Releases

Arteris IP Ncore® and FlexNoC® Interconnects and Resilience Packages Licensed by Mobileye for AI-Powered EyeQ Chips

Next generation ASIL B(D) autonomous driving systems to be enabled by ISO 26262-compliant cache coherent and non-coherent interconnect IP

CAMPBELL, Calif. — July 10, 2018 — Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip(NoC) interconnect intellectual property, today announced that Mobileye has purchased multiple licenses of Arteris IP Ncore Cache Coherent Interconnect, FlexNoC Interconnect, and the Ncore and FlexNoC Resilience Packages for functional safety and artificial intelligence (AI) hardware acceleration. This broad portfolio of Arteris IP interconnect technology will be the on-chip communications backbone of Mobileye’s next-generation ISO 26262 ASIL B(D) capable next generation EyeQ system-on-chip (SoC) devices.

We chose the Arteris Ncore cache coherent interconnect because of its unique proxy caches and their ability to underpin high-performance, low power, cache coherent clusters of our unique AI accelerators. And with our prior experience using FlexNoC and the FlexNoC Resilience Packages for functional safety, we trust Arteris IP to be the highest performing and safest choice for ISO 26262-compliant NoC IP.”


Elchanan Rushinek, Vice President of EngineeringMobileye

Topics: mobileye ncore resilience package ncore cache coherent interconnect flexnoc interconnect flexnoc resilience package eyeq iso 26262 ASIL new customer

ArterisIP Joins GLOBALFOUNDRIES FDXcelerator Partner Program

Program enables faster development of automotive and IoT systems-on-chip (SoC)

CAMPBELL, Calif. — October 10, 2017 — ArterisIP, the innovative supplier of silicon-proven
commercial system-on-chip (SoC) interconnect IP, today announced it has joined the GLOBALFOUNDRIES FDXcelerator™ Partner Program. This program enables SoC designers to integrate ArterisIP interconnect IP into their projects with the ability to accelerate the timing closure process for FDX-based designs. The partnership speeds the development of pioneering products in applications from automotive ADAS and machine learning to small IoT processors.

The addition of ArterisIP to the FDXcelerator Partnership Program has already realized benefits with the implementation of an FD-SOI automotive ADAS multi-processor SoC with fellow FDXcelerator partner Dream Chip Technologies.


Alain Mutricy, Senior Vice President of Product Management, GLOBALFOUNDRIES

Topics: ncore resilience package ArterisIP partner flexnoc resilience package

ArterisIP announces Ncore 3 Cache Coherent Interconnect

Enables next-generation machine learning and autonomous driving SoCs with support for Arm AMBA CHI protocol, CCIX, and ISO 26262 Functional Safety

Linley Processor Conference 2017, SANTA CLARA, Calif. — October 4, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the Ncore Cache Coherent Interconnect IP version 3 along with the optional Ncore Resilience Package for functional safety.

As current users of the Ncore cache coherent interconnect, we are excited about the technical innovation in ArterisIP’s new Ncore 3 IP. Enabling both the AMBA CHI and ACE protocols in the same SoC will allow for greater use of existing IP in high-performance systems.


Mr. Yu Li, Vice President , ZTE (SaneChips)

Topics: new product Ncore cache coherent interconnect CCIX AMBA5 CHI AMBA ACE protocol ncore resilience package ISO 26262 certification

ArterisIP Ncore Cache Coherent Interconnect and Resilience Package Licensed by NXP

CAMPBELL, Calif. — September 19, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that NXP Semiconductors has licensed additional uses of Ncore Cache Coherent Interconnect IP and Ncore Resilience Packages.

We had an excellent experience implementing ArterisIP’s Ncore Cache Coherent Interconnect IP in our previous SoC developments so we have chosen to expand the adoption of this technology for our next generation SoCs.


Benny Chang, Vice President of R&D, Automotive MCU and Processors Business LineNXP Semiconductors

Topics: new customer automotive Ncore heterogeneous cache coherency cache coherent interconnect NXP Semiconductors automotive functional safety ISO 26262 ASIL D ncore resilience package autonomous driving