Arteris Press Releases

Arteris IP Announces CodaCache™️ Standalone Last Level Cache

Unlock the full performance of your SoC architecture with a last level cache

CAMPBELL, Calif. — June 7, 2018 — Arteris IP, the leading supplier of innovative, silicon-proven network-on-chip(NoC) interconnect intellectual property, today announced the CodaCache standalone last level cache (LLC) for high-performance systems-on-chip (SoCs).

Designers will be attracted to the variety of use cases that CodaCache IP supports, including dedicated, shared, and distributed partitioning, as well as its use as on-chip scratchpad storage.”


Mike Demler, Senior Analyst and Senior EditorThe Linley Group and  Microprocessor Report

Topics: new product CodaCache

ArterisIP announces Ncore 3 Cache Coherent Interconnect

Enables next-generation machine learning and autonomous driving SoCs with support for Arm AMBA CHI protocol, CCIX, and ISO 26262 Functional Safety

Linley Processor Conference 2017, SANTA CLARA, Calif. — October 4, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the Ncore Cache Coherent Interconnect IP version 3 along with the optional Ncore Resilience Package for functional safety.

As current users of the Ncore cache coherent interconnect, we are excited about the technical innovation in ArterisIP’s new Ncore 3 IP. Enabling both the AMBA CHI and ACE protocols in the same SoC will allow for greater use of existing IP in high-performance systems.


Mr. Yu Li, Vice President , ZTE (SaneChips)

Topics: new product AMBA ACE protocol Ncore cache coherent interconnect CCIX ncore resilience package ISO 26262 certification AMBA5 CHI

ArterisIP Advances Machine Learning SoC Design with Ncore 2.0 Cache Coherent Interconnect and Resilience Package

SoC interconnect IP enables highly scalable neural network systems with integrated hardware functional safety features for ISO 26262 ASIL D compliance

Linley Autonomous Hardware Conference 2017, SANTA CLARA, Calif. — April 6, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the Ncore 2.0 Cache Coherent Interconnect IP and the optional Ncore Resilience Package to accelerate and enhance the creation of next-generation designs for autonomous driving systems and advanced driver assistance systems (ADAS).

We are very impressed with the new ArterisIP Ncore interconnect IP technologyArterisIP Ncore 2.0 interconnect IP offers even higher scalability along with the Coherent Memory Cache, which reduces DRAM accesses while maintaining area efficiency.


Mr. Yu Li, Vice President, Sanechips (Subsidiary of ZTE)

Topics: ISO 26262 new product machine learning Ncore automotive functional safety ArterisIP ncore resilience package neural networks

Arteris Ncore Cache Coherent Interconnect and FlexNoC IP are Licensed by ZTE

Leading Chinese systems manufacturer purchases multiple licenses for cache coherent interconnect IP and network-on-chip fabric IP

CAMPBELL, Calif. — March 14, 2017 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that the chip design division of ZTE has licensed the highly-configurable Arteris® Ncore™ cache coherent interconnect IP as well as the Arteris FlexNoC® interconnect IP for use in its advanced systems-on-chip (SoC).

We chose Arteris Ncore interconnect IP and Arteris FlexNoC IP after an extensive evaluation where we ascertained technology to address the optimal mixing of ARM- and PCIe-based traffic in complex embedded systems.


Mr. Yu Li, Vice President, ZTE

Topics: Arteris FlexNoC new product china Ncore