SoC interconnect IP enables highly scalable neural network systems with integrated hardware functional safety features for ISO 26262 ASIL D compliance
Linley Autonomous Hardware Conference 2017, SANTA CLARA, Calif. — April 6, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced the Ncore 2.0 Cache Coherent Interconnect IP and the optional Ncore Resilience Package to accelerate and enhance the creation of next-generation designs for autonomous driving systems and advanced driver assistance systems (ADAS).
We are very impressed with the new ArterisIP Ncore interconnect IP technology. ArterisIP Ncore 2.0 interconnect IP offers even higher scalability along with the Coherent Memory Cache, which reduces DRAM accesses while maintaining area efficiency.
Mr. Yu Li, Vice President, Sanechips (Subsidiary of ZTE)