ARTERIS CHANGES ORGANIZATION FOR CONTINUED GROWTH

Promotes Nafees Qureshy to VP of Engineering and Philippe Martin to CTO

Paris, France — June 19, 2007 — Arteris Inc., the leading provider of Network-on-Chip (NoC) solutions addressing challenges associated with on-chip communications, today announced that Nafees Qureshy will become the Vice President of Engineering and Philippe Martin will become the Chief Technical Officer for the company. Qureshy was formerly Vice President of Engineering at Jasper Design Automation and Director of Engineering at Coware Inc. and IKOS Systems.

Martin, who has been with the company since its early stages, assumes responsibility for longer range technology definition and applying NoC solutions to specific customer SoC architectures. Martin has a long track record of technology definition and customer-driven development at companies such as Mentor Graphics and Sonics. He operationally replaces Alain Fanet, a co-founder of Arteris, who will remain on the company's Board of Directors.

Philippe di Crescenzo, formerly Director of Product Marketing at Arteris, becomes Director of Engineering of Arteris' Paris office, reporting to Qureshy.

"With our new technical management team in place, we are ready for the next stage of development in Arteris development as the market leader in Network on Chip technology," said Charlie Janac, President and CEO of Arteris.

Arteris has also appointed Don Werner as the Senior Director of Sales for North America, reporting to Charlie Janac. Werner comes to Arteris from Azuro where he was Director of Sales, and Virage Logic where he was a Regional Sales Manager.

"Don is an experienced IP and EDA sales executive and we are looking forward to taking advantage of his experience and connections," said Janac.

Arklin Kee becomes Vice President of Worldwide Business Development, responsible for all Arteris' business development activities including Japan and ROA sales and all third party relationships.

About Arteris
Arteris, Inc. provides IP and associated design tools to improve performance of system-on-chip (SoC) architectures for multimedia, telecom and mobile. Arteris' Network-on-Chip (NoC) solutions transport and manage the on-chip communications within complex SoC integrated circuits, increasing performance, reducing number of global wires, with lower power utilization while enabling the most complex, IP-laden designs. It allows chip developers to implement efficient and high-performance NoC designs, overcoming limitations of traditional layered or pipelined bus-based architectures. Arteris' technology is scaleable in terms of the number of IP blocks designers can network, as well as with deep submicron silicon manufacturing processes. The NoC solutions are compatible with existing design flows and with IP interface standards.

The international company operates globally with headquarters in San Jose, California and an office in Paris, France. Arteris has raised more than $24 million in equity investment from an international set of venture capitalists, including Synopsys, Crescendo Ventures, Techno Venture Management and Ventech. More information can be found at http://www.arteris.com.


For more information, contact:

Charlie Janac
Arteris, Inc
+1.650.224.4041
charlie.janac@arteris.com

Mike Sottak
Wired Island, Ltd.
+1 (408) 876-4418
mike@wiredislandpr.com



Download pdf

 
   






Copyright© 2007 Arteris SA. Arteris, NoCcompiler and NoCexplorer are trademarks of Arteris, SA. All other trademarks are property of their respective owners.