IMEC, Arteris, CoWare, and Mentor Graphics collaboration zeroes in on multi-mode multi-media ambient-intelligence platforms

Munich, Germany — 6 March 2006 —At today's opening of the DATE conference, IMEC announced that it has extended collaborations with CoWare while adding Arteris and Mentor Graphics to its multi-mode multi-media (M4) research & development program. Based on these cooperations, new design concepts and a practical hardware & software and verification platform are developed for highly-efficient and flexible multi-processor platforms that enable the creation of future ambient-intelligence environments.

Based on low-power, software-defined radio technology and flexible multimedia codec technology, future M4-based terminals will adapt automatically to their surroundings and enable seamless multimedia services experience to the end user, independent of the available radio system.

Using CoWare's proven platform-based ESL design solutions and IMEC's experimental software tools, the two research teams define and optimize integrated design flows for multi-standard wireless and multi-media platforms based on multi-processor systems on chips (SoCs).

The collaboration with Arteris enables IMEC to architect the M4 on-chip communication infrastructure for the new generation of multi-format multimedia devices, handling high bandwidth traffic in multiple-processors platform. This technology choice allows the creation of multi-processor platforms that can be scaled down to accommodate even smaller manufacturing efficiencies in the future.

The newly established collaboration with Mentor Graphics gives IMEC access to powerful emulation technology that will speed up the verification process of its demonstrators significantly.

"With Arteris, CoWare and Mentor joining our M4 program, IMEC is creating an open research platform where leading companies developing embedded systems or services for ambient intelligence jointly tackle the research challenges by tight research cooperation," says Rudy Lauwereins, Vice President Design Technology for Integrated Information and Communication Systems at IMEC. "By bringing together the different companies in the value chain we will accelerate innovations in designing wireless embedded systems."

"The IMEC M4 program is an ideal application for the Arteris Network on Chip(NoC) approach as it requires leading-edge performance, scalability and the ability to quickly and efficiently integrate and re-use IP from multiple sources. We are pleased to be part of this collaborative effort and work with leading design tool suppliers such as CoWare and Mentor to enable an NoC communication methodology for IMEC," Charlie Janac, Chairman and CEO.

"The M4 partnership has been a great vehicle to further tighten the strategic relationship between IMEC and CoWare," said Karl Van Rompaey, CoWare's chief technical officer. "CoWare's ESL design solutions are successfully deployed in IMEC's M4 design flow. The M4 project allows us to efficiently share research results and validate our products on multi-media applications and multi-processor architectures of the future."

"The M4 project at IMEC is a great example of research in-step with industry needs", says Eric Selosse, Vice President & General Manager, Mentor Emulation Division. "IMEC's vision for its M4 platform is coupled with their recognition that prototypes must be proven so that they may be adopted by industry. Emulation with VStation gives IMEC the power to prove their technology and is scaleable to meet the expected requirements as the M4 platform design size grows."

Today's Design Technology Challenges
Current design flows are optimized for single-processor platforms, leaving designers to grapple with several decisions before communications, data, and task assignments can be made within a system. IMEC's research works to solve these design challenges in multi-processor platforms and, at the same time, seeks methods to manage the design tradeoffs between system complexity, performance and efficiencies of power and other resources.

Focusing on a multi-processor system on chip (MPSoC) approach requires efficient communications between processors, using network techniques comparable to computer networks. Arteris has developed for this purpose a Network-on-Chip (NoC), that allows functional units to be connected and to communicate to each other trough packaged messages. Such a NoC can replace any set of buses on a chip and reduce design complexity.

A significant advantage of such an approach is that scaling of platforms becomes easier and more flexible. It becomes possible to develop several versions of one platform, depending on the targeted application domain and performance requirements, just by removing redundant functional units from the platform, and, as such, reducing the amount of parallelism that can be deployed on the platform. IMEC is using the NoC in conjunction with its own multi-processor mapping methodology to obtain a predictable power-performance trade-off for complex applications. Using communications-assist blocks, complex data transfers can be orchestrated between different processors and memories in the architecture.

IMEC's goal is to prove its technologies with highly complex real-life prototypes comprised of millions of transistors. As timing also plays a crucial role in building these demonstrators, an advanced emulation environment is must for the successful execution of M4. For this reason, Mentor-Graphics will play a key role as a collaborative partner in the M4 program by contributing their VStation platform. The Vstation will allow IMEC to verify designs of several million gates within reasonable times.

About IMEC
IMEC is a world-leading independent research center in nanoelectronics and nanotechnology. Its research focuses on the next generations of chips and systems, and on the enabling technologies for ambient intelligence. IMEC's research bridges the gap between fundamental research at universities and technology development in industry. Its unique balance of processing and system know-how, intellectual property portfolio, state-of-the-art infrastructure and its strong network of companies, universities and research institutes worldwide position IMEC as a key partner for shaping technologies for future systems. As an expansion of its wireless autonomous microsystems research, IMEC has created a legal entity in the Netherlands. Stichting IMEC Nederland runs activities at the Holst Centre, an independent R&D institute that develops generic technologies and technology platforms for autonomous wireless transducer solutions and systems-in-foil.

IMEC is headquartered in Leuven, Belgium, and has representatives in the US, China and Japan. Its staff of about 1400 people includes close to 500 industrial residents and guest researchers. In 2005, its revenues are estimated to be close to EUR 200 million. Further information on IMEC can be found at www.imec.be.

About Arteris
Arteris, SA, provides Network on Chip solutions to transport and manage the on-chip communications within complex System-on-Chip (SoC) integrated circuits, increasing performance, reducing number of global wires, with lower power utilization while enabling the most complex, IP-laden designs. It allows chip developers to implement efficient and high-performance Network-on-Chip (NoC) designs, overcoming limitations of traditional layered or pipelined bus-based architectures. Arteris' technology is scaleable in terms of the number of IP blocks designers can network, as well as with deep submicron silicon manufacturing processes. The NoC solutions are compatible with existing design flows and with IP interface standards.

The Paris-based company operates globally with offices in Boston and San Jose, California. Arteris has raised more than $12 million in equity investment from an international set of venture capitalists, including Crescendo Ventures, Techno Venture Management and Ventech. More information can be found at www.arteris.com.

About CoWare
CoWare is the leading supplier of platform-driven electronic system-level (ESL) design software and services. CoWare offers a comprehensive set of ESL tools that enable electronic companies to "differentiate by design" through the creation of system IP including embedded processors, on-chip buses, and DSP algorithms; the architecture of optimized SoC platforms; and hardware/software co-design. The company's solutions are based on open industry standards including SystemC. CoWare's customers are major systems, semiconductor, and IP companies in the market where consumer electronics, computing, and communications converge. CoWare's corporate investors include ARM Ltd. [(LSE: ARM); (Nasdaq: ARMHY)], Cadence Design Systems (Nasdaq: CDNS), STMicroelectronics (NYSE: STM), and Sony Corporation (NYSE: SNE). CoWare is headquartered in San Jose, Calif., and has offices around the world. For more information about CoWare and its products and services visit www.coware.com.

About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $700 million and employs approximately 4000 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com

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