Artificial Intelligence Track | July 18, 10:00 – 10:15
Configurable High-performance Interconnect Architectures to Accelerate RISC-V AI/ML and ADAS SoCs
Hao Luan, Chief Architect, Arteris
High-Performance Computing Track | July 18, 10:00 – 10:15
Scaling RISC-V Systems for High-Performance Computing Architectures
Yan Zhang, Principal FAE, SiFive
Cunrong Feng, Senior FAE Manager, Arteris