EDN: How NoC architecture solves MCU design challenges
Explore how today’s NoC architectures solve MCU design challenges by optimizing timing closure, minimizing wire count, and reducing die area while supporting high-bandwidth, low-latency communication.
Design News: The Hidden Technology Behind Faster, Smarter Silicon Chips
Engineering time can be significantly reduced thanks to the use of smart NoC IP technology like FlexGen smart NoC IP from Arteris. Learn more in the article.
Semiconductor Engineering: Challenges In Managing Chiplet Resources
The chip industry is exploring multiple avenues for simplifying multi-die integration, but difficulties remain for optimizing designs. Learn more in the article.
Semiconductor Engineering: Achieving Lower Power, Better Performance, And Optimized Wire Length In Advanced SoC Designs
As design complexity increases, manual design approaches can struggle to minimize wire length. Learn more about how the solutions like Arteris’ FlexGen can help one optimize that.
Semiconductor Engineering: The Evolving Role Of AI In Verification
The pressure on verification engineers to ensure the functional correctness of devices has increased exponentially as chips have gotten more complex and evolved into SoC, 3D-ICs, multi-die chiplets and beyond. Learn what the take on that of the industry experts is in this article.
Silicon Semiconductor: Revolutionizing Semiconductor Design
Phil Alsop, Editor of Silicon Semiconductor Magazine, discusses exciting developments with Arteris’ Andy Nightingale including the launch of FlexGen and the immediate availability of the latest generation of Magillem Registers technology for SoC integration automation.
EE Times: SoCs Get a Helping Hand from AI Platform FlexGen
Explore how AI-driven tools are transforming chip design, tackling the growing complexity in industries like AI, autonomous driving, and cloud computing. Learn how solutions such as FlexGen boost productivity, streamline iterations, and optimize power and performance for cutting-edge technologies.
Semiconductor Engineering: Optimizing Data Movement In SoCs And Advanced Packages
Explore how the growing demand for low-latency on-chip communication and the need for managing all of this with less power and using a simpler setup can be met.
SemiWiki: How Arteris FlexGen Smart NoC IP Democratizes Advanced Chip Design
SemiWiki’s Dan Nenni explores the capabilities and impact of Arteris FlexGen – Smart NoC IP with Rick Bye, director of Product Management and Marketing at Arteris. This revolutionary product uses cutting-edge AI heuristics and machine learning to automate NoC generation and deliver expert-level results without the expert or length design cycles
Design News: How Can Network On-Chip IP Can Meet System-On-Chip Demands?
Arteris recently developed FlexGen IP for system-on-chip design. In this conversation with Design News, Rick Bye, Arteris’s Director of Product Management and Marketing, talks about the product’s function and applications.
