Arteris Articles

Semiconductor Engineering: Is Hardware-Assisted Verification Avoidable?

Khaled Labib, Vice President of Engineering at Arteris IP is quoted in this new article in Semiconductor Engineering:

Is Hardware-Assisted Verification Avoidable?

October 28th, 2020 - By Brian Bailey

Simulation is no longer up to the task of system-level verification, but making the switch to hardware-assisted verification can lead to some surprises if you do not fully plan ahead.

Bringing hardware-assisted verification in for the first time is not easy. “For a small company, emulation systems are expensive,” says Arteris’ Labib. “The ones with more advanced features run you about a million dollars for an average starting configuration. If you want to start lower than that, you’re going to have to either give up on features or go with a smaller commercial configuration. But this has become critical to our business, and even as a small company we had to find the necessary budget to buy emulation.”

Topics: SoC NoC semiconductor engineering interconnects emulation noc interconnect IP market cloud khaled labib testbench configurable IP solution regression

Semiconductor Engineering: A Renaissance For Semiconductors

Kurt Shuler, Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

A Renaissance For Semiconductors

October 28th, 2020 - By Brian Bailey

New horizontal technologies and vertical markets are fueling the opportunities for massive innovation throughout an expanding ecosystem.

Even within artificial intelligence there are multiple facets to the problem. “From an SoC architecture standpoint, think of a 2 x 2 matrix where you have data center versus edge on one side,” says Kurt Shuler, vice president of marketing at Arteris IP. “People may argue about where the dividing line is, but you could think of it as stuff that runs off a battery versus stuff that has to be plugged in. The other side is artificial intelligence, and there are two aspects to that. One is training the neural network, and the other is using that neural network in the real world — inference. So you have this 2 x 2 matrix of data center versus edge, and training versus inference.

Topics: SoC NoC software automotive semiconductor engineering soc architecture interconnects kurt shuler noc interconnect chiplets 5G IP market chips

Semiconductor Engineering: Sensor Fusion Challenges In Cars

Kurt Shuler, Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

Sensor Fusion Challenges In Cars

October 8th, 2020 - By Ann Steffora Mutschler

As more pieces of the autonomous vehicle puzzle come into view, the enormity of the challenge grows.

You could say it’s the Wild West, but you could also say there’s tons of innovation happening,” said Kurt Shuler, vice president of marketing at Arteris IP. “That’s true whether it’s on the sensor chips or whether it’s on the ADAS brain chips. Eventually you want to be able to explain things in symbolic terms, and have an intermediate layer such that once you get this data, the data as its transmitted is in some kind of lingua franca that both sides can understand even though they’re from two separate companies. What I don’t know is how much processing it will take to move something from more of a raw data format into something useful. Eventually, there has to be a data format.”

Topics: SoC NoC automotive ADAS autonomous vehicles radar semiconductor engineering soc architecture LIDAR interconnects kurt shuler noc interconnect data ML/AI IP market

Semiconductor Engineering: Good Vs. Bad Acquisitions

K. Charles Janac, President and CEO at Arteris IP is quoted in this new article in Semiconductor Engineering:

Good Vs. Bad Acquisitions

October 7th, 2020 - By Ed Sperling

M&A begins to ramp up, but not all of them will work.

Making acquisitions is one thing, but it’s the result afterwards is that that really matters,” said K. Charles Janac, chairman and CEO of Arteris IP. “If your company culture is very different from any other company culture, that makes it much more difficult. We’ve seen that with some acquisitions that have not been very profitable, and the company may end up divesting.”

Arteris IP’s pending acquisition of Magillem Design Services is aimed at expanding its footprint beyond the network on chip into what Janac calls SoC assembly. Magillem can package IP in an SoC into an IP-XACT format, which paves the way for uniform communication in an SoC or an advanced package.

Topics: SoC NoC acquisitions automotive semiconductor engineering soc architecture K. Charles Janac ip-xact SoC assembly noc interconnect ML/AI 5G IP market Magillem Design Services