Arteris Articles

For the full list of official ISO 26262 functional safety terms and definitions, please visit: https://www.iso.org/obp/ui/?__hstc=&__hssc=&hsCtaTracking=572481ff-57d3-45b9-b995-73217330faaf%7C1caec818-2db1-4189-868d-d950123f04d3#iso:std:iso:26262:-1:ed-2:v1:en

Kurt Shuler, VP of Marketing at Arteris IP, comments in this Semiconductor Engineering article:

Autonomous Vehicle Design Begins To Change Direction

October 10th, 2018 - By Ann Steffora Mutschler

On-chip networks become a lot more challenging at the high-end of machine learning (ML). Bernard Murphy (SemiWiki) talked with Kurt Shuler, VP Marketing at Arteris IP, about the experience they have developed over the years of working with well-known ML product builders and how this has influenced  the AI package recently released by Arteris IP in this SemiWiki blog:

On-Chip Networks at the Bleeding Edge of ML 

November 29th,  2018 - By Bernard Murphy

I wrote a while back about some of the more exotic architectures for machine learning (ML), especially for neural net (NN) training in the data center but also in some edge applications. In less hairy applications, we’re used to seeing CPU-based NNs at the low end, GPUs most commonly (and most widely known) in data centers as the workhorse for training, and for the early incarnations of some mobile apps (mobile AR/MR for example), FPGAs in applications where architecture/performance becomes more important but power isn’t super-constrained, DSPs in applications pushing performance per watt harder and custom designs such as the Google TPU pushing even harder.

On Friday, Jerry Shu, Senior Manager for Automotive Marketing at Arm and Gary Ge, Senior Solutions Architect at Arteris IP, jointly presented "Implementing ISO 26262 Compliant AI Systems with Arm and Arteris IP" to an audience at the ICCAD China conference in Zhuhai China.