Arteris Articles

Semiconductor Engineering: Productivity Keeping Pace With Complexity

Benoit de Lescure, CTO at Arteris IP is quoted in this new article in Semiconductor Engineering:

Productivity Keeping Pace With Complexity

September 25th, 2020 - By Brian Bailey

Without productivity gains, design size and complexity would face huge headwinds. Those gains come from a diverse set of improvements.

Nobody doubts the power of reuse. Intellectual Property blocks are either built into a library for those inside of large companies, or if you’re a small company, you go outside and you buy it,” says Benoit de Lescure, CTO for Arteris IP. “Complexity is managed through a divide and conquer strategy. Companies are also using larger macro functions that you stitch together with the same amount of people. Today, you can buy a multiple CPU block, with Level 3 cache, and complex cache coherent interconnect. These have been designed to be easy to configure, and so you can create a very large CPU complex with 8 or 16 CPUs, and that becomes the macro functions you’re integrating.”

Topics: SoC NoC automotive cache coherent interconnect semiconductor engineering soc architecture CPUs Benoit de Lescure verification noc interconnect ML/AI IP market

Semiconductor Engineering: Have Processor Counts Stalled?

Michael Frank, Fellow and Chief Architect at Arteris IP quoted in this new article in Semiconductor Engineering:

Have Processor Counts Stalled?

September 24th, 2020 - By Brian Bailey

Have chips reached a plateau for the number of processor cores they can effectively make use of? Possibly yes, until you change the programming model.

“The number of processors has stalled in platforms like PCs or portable devices,” says Michael Frank, fellow and system architect at Arteris IP. “This has less to do with Moore’s Law leveling out than the fact that it’s getting very hard, from a software point of view, to find enough work for more processors. Unless you have highly parallel workloads, it is really really hard to keep all these cores busy.”

Topics: SoC NoC automotive multicore semiconductor engineering soc architecture noc interconnect ML/AI high-performance dataflow IP market processor cores

SemiWiki: AI in Korea. Low-Key PR, Active Development

Kurt Shuler, vice president at Arteris IP talks with Bernard Murphy about AI in Korea in this new SemiWiki blog:

AI in Korea.Low-Key PR, Active Development

September 15, 2020 - Bernard Murphy

Based on press coverage and technical paper volume, you could be forgiven for thinking that Korea had decided to take a pass on AI mania, or maybe just to dabble a little here and there to stay abreast of trends. But you’d be wrong. Korea is very active in AI; they don’t feel a need to trumpet what they’re doing from the rooftops. If you dig around, there are plenty of hints. I talked with Kurt Shuler of Arteris IP to get a better understanding. I’m talking here about AI hardware, of course.

Topics: SoC network-on-chip semiconductor automotive ADAS Ncore FlexNoC AI semiwiki noc interconnect sait kaist snu korea ai

Semiconductor Engineering: The Role Of NoCs In System-Level Services

Kurt Shuler, Vice President of Marketing at Arteris IP authored this new article in Semiconductor Engineering:

The Role Of NoCs In System-Level Services

September 8th, 2020 - By Kurt Shuler

The central nervous system of SoCs is expanding to help manage things like QoS and performance.

The primary objective of any network-on-chip (NoC) interconnect is to move data around a chip as efficiently as possible with as little impact as possible on design closure while meeting or exceeding key design metrics (PPA, etc.). These networks have become the central nervous system of SoCs and are starting to play a larger role in system-level services like quality of service (QoS), debug, performance analysis, safety and security because these on-chip interconnects transport and “see” most if not all of the of the on-chip dataflow. Think of the NoC as the SoC’s “all seeing eye” and you’ll have a better understanding of what is technically possible.
 
Topics: SoC NoC ISO 26262 SoC QoS automotive semiconductor engineering soc architecture ASIL D kurt shuler QoS noc interconnect IP market

Semiconductor Engineering: Software-Defined Vehicles

Kurt Shuler, Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

Software-Defined Vehicles

September 4th, 2020 - By Bryon Moyer

The electrification of cars makes all sorts of things possible. 

“There’s a big open question regarding how these updates affect functional safety,” said Kurt Shuler, vice president of marketing at Arteris IP . “Is it practical to completely redo the safety analysis for each update?”
 
Topics: SoC NoC functional safety ISO 26262 automotive ADAS NoC technology semiconductor engineering soc architecture kurt shuler AI chips noc interconnect IP market

Semiconductor Engineering: Interconnects Emerge As Key Concern For Performance

Kurt Shuler, Vice President of Marketing at Arteris IP is quoted in this new article in Semiconductor Engineering:

Interconnects Emerge As Key Concern For Performance

September 3rd, 2020 - By Ed Sperling

Complexity, abundant options, and limits on tooling make this an increasingly challenging area. 

“On the AI side of things, the architecture is being determined by the capabilities of the interconnect,” said Kurt Shuler, vice president of marketing at Arteris IP . “It’s not just about the individual processing elements. It’s how do you get data between the processing elements and a whole bunch of local memories. In a lot of these AI chips, for power as well as latency and bandwidth, they want to limit as much as possible going off to DRAM, which means you’ve got to do the processing in situ within the chip. You can think of the interconnect as knobs and dials of what you’re capable of doing within these huge AI chips.”
 
Topics: SoC NoC NoC technology semiconductor engineering soc architecture DRAM AI chips noc interconnect IP market